All Programmable FPGAs, SoCs, and 3D ICs

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Presentation transcript:

All Programmable FPGAs, SoCs, and 3D ICs Part II. Understanding the Role of Hardware Description Languages 11 December 2012 Clive “Max” Maxfield

Creating a Program for an MCU

Creating a Design for an FPGA

Things Happen Sequentially in S/W Pseudo-code example of regular (sequential) programming language like C/C++

Things Happen Concurrently in H/W

HDLs Capture Concurrency Pseudo-code example of HDL like Verilog or VHDL

Simulation and Synthesis

A Honking Big S/W Program

A Honking Big H/W Design

Procedures and Functions in S/W

The Way the S/W Program Executes

Blocks (Modules) in H/W

The Way the H/W Could Run

Multiple S/W Proc/Func Calls

Multiple H/W Block Instantiations

Multiple H/W Block Instantiations…

Multiple H/W Block Instantiations…

Different Levels of Abstraction Additional Terms Functional Behavioral Structural

Different Levels of Abstraction (cont.)

The Origins of HDLs A cornucopia of languages SPICE VHDL / Verilog UDL/I Superlog / SystemVerilog Bluespec SystemVerilog (BSV) MyHDL SystemC

More Information / Further Reading www.AllProgrammablePlanet.com