Asynchronous Sequential Logic

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Presentation transcript:

Asynchronous Sequential Logic LECTURE 3 Introduction Analysis Procedure Gunjeet kaur Dronacharya Group of Institutions

Introduction Synchronous Sequential Circuits The change of internal state occurs in response to the synchronized clock pulse. Memory elements are clocked flip-flops. Asynchronous Sequential Circuits The change of internal state occurs when there is a change in the input variables. Memory elements are unclocked flip-flops or time-delay elements.

Introduction Synchronous Sequential Circuits Timing problems are eliminated by triggering all flip-flops with pulse edge. Higher speed More economical Asynchronous Sequential Circuits Care must be taken to ensure that each new state is stable even though a feedback path exists.

Introduction Asynchronous Sequential Circuits When an input variable changes in value, the y secondary variables do not change instantaneously.

Introduction Asynchronous Sequential Circuits In steady-state condition, the y's and the Y's are the same, but during transition they are not.

Introduction Fundamental mode Fundamental mode :Only one input variable can change at any one time and the time between two input changes must be longer than the time it takes the circuit to reach a stable state.

Analysis Procedure Transition Table Y1 = xy1 + x'y2 Y2 = xy'1 + x'y2

Analysis Procedure Transition Table Y1 = xy1 + x'y2 Y2 = xy'1 + x'y2

Analysis Procedure Transition Table For a state to be stable, the value of Y must be the same as that of y = y1y2

Analysis Procedure Transition Table The Unstable states, Y ≠ y

Analysis Procedure Transition Table Consider the square for x = 0 and y = 00. It is stable. x changes from 0 to 1. The circuit changes the value of Y to 01. The state is unstable. The feedback causes a change in y to 01. The circuit reaches stable.

Analysis Procedure Transition Table In general, if a change in the input takes the circuit to an unstable state, y will change until it reaches a stable state.

Analysis Procedure Flow Table Flow Table Transition table whose states are named by letter symbol instead of binary values.

Analysis Procedure Flow Table It is called primitive flow table because it has only one stable state in each row. Flow Table It is a flow table with more than one stable state in the same row.

Analysis Procedure Flow Table

Analysis Procedure

Analysis Procedure Race Conditions Two or more binary state variables change value in response to a change in an input variable Race Conditions Noncritical Race: State variables change from 00 to 11. The possible transition could be It is a noncritical race. The final stable state that the circuit reaches does not depend on the order in which the state variables change. 00 11 00 01 11 00 10 11

Analysis Procedure Race Conditions Critical Race: It is a critical race. The final stable state depends on the order in which the state variables change. Race Conditions Critical Race: State variables change from 00 to 11. The possible transition could be 00 11 00 01 11 00 10

Analysis Procedure Race Conditions Cycle When a circuit goes through a unique sequence of unstable states, it is said to have a cycle. Cycle It starts with y1 y2 =00, then input changes from 0 to 1. The sequence is as follows, 00 01 11

Analysis Procedure Stability Consideration Column 11 has no stable state. With input x1 x2 = 11, Y and y are never the same. This will cause instability.