Time-sensitive CMOS MAPS Drift assisted signal collection in CMOS MAPS. Brookhaven National Laboratory Politecnico di Milano State University of New York at Stony Brook Institut de Recherches Subatomiques, Strasbourg

Appl. in electron microscopy Counting pulses versus signal integration Precision and resolution Principles of the cell (pixel) Charge collection Planned implementation

Multiple scattering of 200keV electrons in 200 mm of silicon

Multiple scattering of 200 keV electrons in 30 mm of silicon

Multiple scattering of 200 keV electron in 30 mm Si & 500 mm Be

Distribution of energy loss Large fluctuations in signal charge liberated in the epitaxial layer of the sensor For 10 mm of silicon s_Q/Q=50% Perugia May 2006

Charge integration versus counting When signal is the integrated charge Where both q and N are fluctuating Assuming that N is a Poissonian process The total fluctuations are : Substituting for var(q) from the above slide The penalty is only 25% of the dose For a sub-poissonian process (F=0.01-0.1) The penalty of charge method expressed as an increase of the number of electrons required to obtain the same contrast as the counting method can be larger than a factor between 2.5 to 25

N- and P- tap within a pixel Green=n-tubs PMOS No PMOS within anode Red=p-tubs NMOS Substrate (back) voltage is -0.1V

Doping profiles in 2 dimensions

P-electrodes currents at bias

N-electrodes currents There are very small values of currents flowing out of n-type tubs The life time of carriers was put too long (10ms instead of 10ms) No impact ionization under large el. fields

Hole current within the section

Simulation of electron transport

Fractions of collected charge

Waveforms of signal current

Summary of signal waveforms

Consequences of fast signal collection Signal processing time down to 100 ns seems to be realistic Correctible loss of 1% at .1 MHz/pixel Detector can be used for diffraction studies where 1% of pixels have the full rate of 10 GHz with 10% rate correction Implementation of fast read-out for STEM (in 200-400 keV energy range)

Shaping and noise filtering

Small area design

The simplest triangle Where C_in is the input capacitance, g_m is transcondactance of the first transistor and other letters have their usual meening.

Simulated performance

Conclusions Active Pixel Sensor with full CMOS in each pixel seems to be feasible. The presented design was based on the presence of hole currents within the pixel The drift velocity of holes is only about 1% of their thermal velocity Full CMOS allows the implementation of one scaler per pixel. The detailed design depends on the technology of the selected foundry