Coe818 Advanced Computer Architecture

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Presentation transcript:

Coe818 Advanced Computer Architecture OBJECTIVES Understand What is Used in Advanced Processor Why Industry is Using Multi-Core Performance Limitation and Challenges Facing Computers How can Applications Utilize Advanced Features in the Chip

Multi-core How Multi-Core Communicate Why need Cache Coherency Why need Synchronization The size of L3 in high end and low end CPUs are quite different.

What is Inside Single Core: branch predictor, dynamic scheduling and execution unit This break down is also an approximation.

What is inside a single processor -Parallelism with Pipelining: implementation, hazards, multi execution units and dynamic scheduling -Instruction Level Parallelism: Loop unrolling, Superscalar and VLIW -Parallel Single operation on multiple data: Vector Operations and MMX (SIMD) -Speculative Execution of Instructions: Branch Prediction