Lecture 8 Addendum Booth Multipliers

Source Jean-Pierre Deschamps, Gery Jean Antoine Bioul, Gustavo D. Sutter, Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems, Chapter 12: Multipliers Section 12.2.2 Booth multipliers

Y Multiplicand Ym-1Ym-2 . . . Y1 Y0 X Multiplier xm-1xm-2 . . . x1 x0 Notation Y Multiplicand Ym-1Ym-2 . . . Y1 Y0 X Multiplier xm-1xm-2 . . . x1 x0 P Product (Y  X ) p2m-1p2m-2 . . . p2 p1 p0 If multiplicand and multiplier are of different sizes, usually multiplier has the smaller size

Radix-2 Booth Recoding yi = -xi + xi-1

Radix-2 Booth Multiplier Basic Step

Radix-2 Booth Multiplier Basic Step in Xilinx FPGAs

Radix-2 Booth Multiplier in Xilinx FPGAs

Y Multiplicand Ym-1Ym-2 . . . Y1 Y0 X Multiplier xm-1xm-2 . . . x1 x0 Notation Y Multiplicand Ym-1Ym-2 . . . Y1 Y0 X Multiplier xm-1xm-2 . . . x1 x0 P Product (Y  X ) p2m-1p2m-2 . . . p2 p1 p0 If multiplicand and multiplier are of different sizes, usually multiplier has the smaller size

Radix-4 Booth Multiplier Basic Step

zi/2 = -2xi+1 + xi + xi-1

Radix-4 Booth Multiplier: Left Shifter & Control