Digital Video Recorder Eric Bowden, Matt Ricks, Irene Thompson.

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Presentation transcript:

Digital Video Recorder Eric Bowden, Matt Ricks, Irene Thompson

Wed., February 29, 2006Digital Video Recorder2 Presentation Roadmap Introduction & Motivation Introduction & Motivation Analog Design Digital Design What is a DVR? Why make a DVR? Implementation Overview Specifications (Baseline and Extensions) Initial Tasking Initial Timeline

Wed., February 29, 2006Digital Video Recorder3 What is a Digital Video Recorder? A video capture unit for live television signals Baseline Functionality Pause Live TV Never miss part of a show again due to interruptions Rewind Live TV For up to 15 minutes of the broadcast Fast Forward Allows the user to skip through selected portions of the buffered broadcast

Wed., February 29, 2006Digital Video Recorder4 Motivation Currently available DVRs charge a monthly subscription fee Non-trivially combines both hardware and software components Allows us to explore analog signal processing, analog-to-digital conversion, and digital storage

Wed., February 29, 2006Digital Video Recorder5 DVR Implementation We will develop a PCI 2.2 compliant card (FPGA solution or etching our own PCB) for use in a black box system that sits next to the television source.

Wed., February 29, 2006Digital Video Recorder6 Functional Specification The baseline device must: Convert an analog, NTSC television signal (video/audio) into a digital signal Manipulate live television using pause, play, rewind and fast-forward Store, at minimum, 15 minutes of live television for recall using the aforementioned techniques The recalled audio/video data must be converted back into an NTSC composite signal

Wed., February 29, 2006Digital Video Recorder7 Extended Specification Additional functionality, time permitting Commercial detection and eradication for recorded broadcasts Increased storage capacity Audio/Video compression User interface via remote control

Wed., February 29, 2006Digital Video Recorder8 Tasking Matt Ricks: analog-to-digital encoding and decoding, hardware development Irene Thompson: signal subsystem processing and software development Eric Bowden: analog and digital integration and the software development for the PCI interface

Wed., February 29, 2006Digital Video Recorder9 Initial Timeline April 2006 – Final Design Decisions have been made May 2006 – All hardware components that need to be purchased have been ordered June 2006 – Implementation of individual parts for the DVR has begun August 2006 – Individual components of the project are ready September 2006 – Integration of individual parts and debugging October 2006 – Baseline Specifications have been met December 2006 – Some of the extensions have been put into effect

Wed., February 29, 2006Digital Video Recorder10 Presentation Roadmap Analog to Digital Video Decoding Analog Video Signal PCI Video Capture Card Schematic Introduction & Motivation Analog Design Digital Design Introduction & Motivation

Wed., February 29, 2006Digital Video Recorder11 Video Signal Decoding Tuner (what channel?) 6MHz apart Audio/Video filter Audio and Video ADC Chrominance/Luminance Horizontal and Vertical Sync Noise Filter Video Amplifier

Wed., February 29, 2006Digital Video Recorder12 Analog Video Signal 30 Frames per second (60 Hz) 525 lines per frame (15 kHz) Pixel Frequency = 12.5 MHz

Wed., February 29, 2006Digital Video Recorder13 Video Capture PCI Card

Wed., February 29, 2006Digital Video Recorder14 Commercial Detection

Wed., February 29, 2006Digital Video Recorder15 Presentation Roadmap PCI Microcontroller PCI-Host Communication Speed Considerations Host Application Digital to Analog Encoding Introduction & Motivation Analog Design Digital Design

Wed., February 29, 2006Digital Video Recorder16 PCI Microcontroller There will be a small, simple microcontroller to manage input/output data buffering. This allows major processing to be offloaded to the host computer.

Wed., February 29, 2006Digital Video Recorder17 PCI-Host Communication The device will periodically unload its digitized signal-buffer onto the PCI bus through standard interrupt methods. This data will be received on the host computer by a software application that stores the A/V data to disk. This will necessitate building a kernel module for Windows XP.

Wed., February 29, 2006Digital Video Recorder18 Speed Considerations In order to prevent frame-loss the device must be able to process incoming data and output it to the host faster then data is coming in. PCI 2.2 Bus: 66 MHz 3.3 V signaling with a peak transfer rate of 533 Mb/s Data input bandwidth must be approximately: 300 Mb/s

Wed., February 29, 2006Digital Video Recorder19 Video Signal Detail Diagram

Wed., February 29, 2006Digital Video Recorder20 Host Application The host software will act as an agent Its job is to constantly record A/V data to disk and send requested data back to the PCI card This software will provide the video control user experience Ideally there would be a GUI to allow for advanced broadcast manipulation

Wed., February 29, 2006Digital Video Recorder21 Data Re-encoding Data will be passed back to the card, encoded into an analog signal, mixed and then sent as a composite NTSC signal to the Television.

Wed., February 29, 2006Digital Video Recorder22 The End