Day 31: November 26, 2012 Inductive Noise ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 31: November 26, 2012 Inductive Noise Penn ESE370 Fall2012 -- DeHon
Today Inductive Responses Calculating L Where do inductances show up Impact of inductance on digital circuits How address Penn ESE370 Fall2012 -- DeHon
Response What happens here? Penn ESE370 Fall2012 -- DeHon
LC Response V2 Penn ESE370 Fall2012 -- DeHon
LC Response Penn ESE370 Fall2012 -- DeHon
LC Response Penn ESE370 Fall2012 -- DeHon
LC Response Penn ESE370 Fall2012 -- DeHon
LC Response Penn ESE370 Fall2012 -- DeHon
LC Response Penn ESE370 Fall2012 -- DeHon
LC Response Penn ESE370 Fall2012 -- DeHon
LC Response Penn ESE370 Fall2012 -- DeHon
Response? Penn ESE370 Fall2012 -- DeHon
RLC Response V2 Penn ESE370 Fall2012 -- DeHon
RLC Response Penn ESE370 Fall2012 -- DeHon
RLC Response Penn ESE370 Fall2012 -- DeHon
Solving for w Penn ESE370 Fall2012 -- DeHon
RLC Penn ESE370 Fall2012 -- DeHon
RLC Penn ESE370 Fall2012 -- DeHon
RLC For What happens? What else happens? Oscillation Decay Penn ESE370 Fall2012 -- DeHon
RLC Response (R=100) Penn ESE370 Fall2012 -- DeHon
When Oscillate For what R does this particular circuit oscillate? Penn ESE370 Fall2012 -- DeHon
RLC Response Penn ESE370 Fall2012 -- DeHon
Inductance of Wire Penn ESE370 Fall2012 -- DeHon
Inductance: Wire over Ground Plane Inductance per cm with h=3mil, w=5mil? Penn ESE370 Fall2012 -- DeHon
Lwire C and L per unit length Penn ESE370 Fall2012 -- DeHon
Chip Inductance Cwire = 0.16 pF (for the 1mm) Cwire = 0.16nF/m Permeability m0≈ mSi02=12.6×10-7H/m Permitivity eox=3.5×10-11F/m Penn ESE370 Fall2012 -- DeHon
On Chip Cwire = 0.16 pF (for the 1mm) Cwire = 0.16nF/m Permeability m0≈ mSi02=12.6×10-7H/m Permitivity eox=3.5×10-11F/m 276 pH (for 1 mm) Penn ESE370 Fall2012 -- DeHon
Comparisons 5mil trace on PCB Protoboard wires (0.6mm diameter) About 7nH/cm http://www.consultrsr.com/resources/eis/induct5.htm On chip wire 0.28nH/mm = 2.8nH/cm Penn ESE370 Fall2012 -- DeHon
Inductors Bond pads Chip leads Long wire runs Cables Src: http://en.wikipedia.org/wiki/File:Wirebonding2.svg Penn ESE370 Fall2012 -- DeHon
Where Arise Penn ESE370 Fall2012 -- DeHon
Signal Path Penn ESE370 Fall2012 -- DeHon
Power Ground Penn ESE370 Fall2012 -- DeHon
Shared Power/Ground Example: 74x04 Penn ESE370 Fall2012 -- DeHon
Estimate Req, Ceq for gates in parallel 250 gates switching at clock R0 = 25K W C0 = 0.01 fF say 10C0=0.1fF for typical load 250 gates switching at clock Req = 100W Ceq=25fF Assume L=1nH Penn ESE370 Fall2012 -- DeHon
Power Ground Penn ESE370 Fall2012 -- DeHon
RLC Response Penn ESE370 Fall2012 -- DeHon
Today’s Chips How many gates? Penn ESE370 Fall2012 -- DeHon
Multiple Power/Ground Pins Use many power/ground pins How many pins on a package? Divide switching gates by pins To get effective load on each pin Penn ESE370 Fall2012 -- DeHon
How Improve Penn ESE370 Fall2012 -- DeHon
Minimize the L Make wires short Use power and ground planes Think of power plane as a very wide wire Impact on C and L? Penn ESE370 Fall2012 -- DeHon
Add Good C’s Bypass Capacitors – inside the inductances On board On package On chip Penn ESE370 Fall2012 -- DeHon
Bypass Capacitor Example Penn ESE370 Fall2012 -- DeHon
Bypassed Supplies (@ transistor) Penn ESE370 Fall2012 -- DeHon
Bypassed Output Penn ESE370 Fall2012 -- DeHon
Minimize Current Draw More Power/Ground Pins Slower rise/fall times Spread out switching Penn ESE370 Fall2012 -- DeHon
Idea Long wires are inductive Bypass capacitors help Avoid them Especially on power supplies Bypass capacitors help Penn ESE370 Fall2012 -- DeHon
Admin Wednesday Lecture Thursday: Project 2 due Friday in Lab Lab instructions out Wednesday Penn ESE370 Fall2012 -- DeHon