NA Silicon Wafer Committee Liaison Report Updated February 25, 2013

Meeting Information Last meeting Next meeting Tuesday, October 30, 2012, NA Fall Standards Meeting Intel in Santa Clara, CA Next meeting Tuesday, April 2, 2013, NA Spring Standards Meeting San Jose/Santa Clara, CA www.semi.org/standards for the latest update

NA Silicon Wafer Committee Committee Chairmen Noel Poduje /SMS Dinesh Gupta /STA

Silicon Wafer Committee C: Dinesh Gupta - STA C: Noel Poduje – SMS VC: Mike Goldstein – Intel TE: Murray Bullis – Materials & Metrology Specifications Int’l Annealed Wafers TF Dinesh Gupta -STA Int’l 450 mm Wafers TF Mike Goldstein - Intel Int’l Epitaxial Wafers TF Dinesh Gupta - STA Int’l Polished Wafers TF Murray Bullis - Materials & Metrology Int’l SOI Wafers TF Mariam Sadaka- SOITEC Metrology Int’l Advanced Wafer Geometry TF Noel Poduje – SMS Jaydeep Sinha – KLA-Tencor John Valley - MEMC Int’l Advanced Surface Inspection TF George Kren - KLA-Tencor Committee Int’l Test Methods TF Int’l Terminology TF

12/9/2018 New SNARFs Int’l ASI TF Doc. 5503, Line Item Revision to SEMI M52-0912 Guide for Specifying Scanning Surface Inspection Systems for Silicon Wafers for the 130 nm to 11 nm Technology Generations To add M80, Mechanical Specification for Front-Opening Shipping Box Used to Transport and Ship 450 mm Wafers, in reference

12/9/2018 Ballots for Cycle 1-2013 5450A - Revision to SEMI M49-0912, with Title Change to: Guide for Specifying Geometry Measurement Systems for Silicon Wafers for the 130 nm to 16 nm Technology Generations Ballot issued in cycle 1-2013 for review at NA Spring meeting

Metrology Group Int’l Advanced Wafer Geometry TF/Noel Poduje (SMS) & Jaydeep Sinha (KLA-Tencor) [1] Activities are well coordinated internationally EU - Doc. 5430A: Revision to M73, Test Methods for Extracting Relevant Characteristics from Measured Wafer Edge Profiles Ballot issued in cycle 1-2013 for review at SEMICON West

Metrology Group Int’l Advanced Wafer Geometry TF/Noel Poduje (SMS) & Jaydeep Sinha (KLA-Tencor) [2] Drafting doc. 5540, New Auxiliary Information, Illustration of Flatness and Shape Metrics for Silicon Wafers Drafting doc. 5539, Revision of SEMI MF1390-0707 (Reapproved 0512) ,Test Method for Measuring Warp on Silicon Wafers by Automated Non-Contact Scanning

Metrology Group Int’l Advanced Surface Inspection TF/George Kren (KLA-Tencor), John Valley (MEMC) Drafting doc. 5503, Line Item Revision to M52-0912 Guide for Specifying Scanning Surface Inspection Systems for Silicon Wafers for the 130 nm to 11 nm Technology Generations (add M80 in reference) To address Shimizu-san’s negative from SEMICON West Discussed SEMI M53 Model Based Calibration (MBC) - Proof of Concept

Specifications Group TF will continue to support the 450 mm program. 12/9/2018 Specifications Group Int’l 450 mm Wafer TF/Mike Goldstein (Intel) TF will continue to support the 450 mm program. Doc. 5442, Reapproval of SEMI M74-1108, Specification for 450 mm Diameter Mechanical Handling Polished Wafers Ballot passed at SEMICON Japan, being processed for publication

Specifications Group Int’l Polished Wafer TF/Murray Bullis (Materials & Metrology) Drafting Doc. 5543, Line Items Revision of SEMI M1, Specifications for Polished Single Crystal Silicon Wafers This single line item revision corrects a small error in the nanotopography line of Table R1-1 and clarifies the source of the values included therein.

Specifications Group Int’l SOI Wafer TF/Mariam Sadaka (SOITEC) Drafting doc. 5541, Revision of SEMI M41-0707 Specification of Silicon-on-Insulator (SOI) for Power Device/ICs 5 year review Table 1-5 needs to be consolidated Verifying references and test methods

Specifications Group Int’l Epitaxial Wafer TF/Dinesh Gupta (STA) Drafting doc. 5542, Line Item Revision to SEMI M62-0912, Specifications for Silicon Epitaxial Wafers Line items include: 1. Make Revision of Tables R2-7 & R2-8 - Change ¶3-2.7 Nanotopography value and related Footnote #9. 2. Add diameter information to Item 2-6.1 Table R2-7, R2-8 3. Add Some editorial changes

Specifications Group Int’l Annealed Wafer TF/Dinesh Gupta (STA) Doc. 5252A, Revision of SEMI M57 Guide for Specifying Silicon Annealed Wafers (Extension to finer geometries, such as to 65nm, 45nm, 32nm, and 22nm) Ballot was approved at SEMICON Japan, being processed for publication

Committee TF Int’l Terminology TF/Murray Bullis (Materials & Metrology) Revision SEMI M59-0211, Terminology for Silicon Technology No revision at the present time Future terms include: polysilicon, wafer packaging, microscopy and optics terms

Committee TF Int’l Test Methods TF/Dinesh Gupta (STA) Doc. 5313B Line Items Revision of SEMI MF1535-0707, Test Method for Carrier Recombination Lifetime in Silicon Wafers by Noncontact Measurement of Photoconductivity Decay by Microwave Reflectance Consensus is lacking. Ballot failed at SEMICON Japan. Doc. is being circulated for feedback for reballot for review at SEMICON West 2013

Contact For more information, please contact Kevin Nguyen at knguyen@semi.org