Advanced FPGA Based System Design Lecture-8 VHDL Operations & Attributes By: Dr Imtiaz Hussain imtiaz.hussain@faculty.muet.edu.pk
Contents Operations Records Signed & Unsigned Data Attributes
Operations VHDL provides several kinds of pre-defined operators: Assignment operators Logical operators Arithmetic operators Relational operators Shift operators Concatenation operators Each of these categories is described in following slides.
Assignment Operators Assignment operators are used to assign values to signals. <= Used to assign a value to a SIGNAL. := Used to assign a value to a VARIABLE, CONSTANT, or GENERIC. Used also for establishing initial values. => Used to assign values to individual vector elements or with OTHERS.
Assignment Operators Consider the following signal and variable declaration. Then following assignments are legal
Logical Operators Logical operators are used to perform logical operations. The data must be of type BIT, STD_LOGIC, or STD_ULOGIC (or, obviously, their respective extensions, BIT_VECTOR, STD_LOGIC_VECTOR, or STD_ULOGIC_VECTOR). The logical operators are: NOT AND OR NAND NOR XOR XNOR
Logical Operators Examples
Arithmetic Operators Arithmetic operators are used to perform arithmetic operations. The data can be type of integer, signed, unsigned or real.
Relational Operators Relational operators are used for making comparisons. The data can be of any type.
Shift Operators Shift operators are used for shifting data. Their syntax is the following: <left operand> <shift operation> <right operand> The left operand must be of type BIT_VECTOR, while the right operand must be an INTEGER (+ or - in front of it is accepted). The shift operators are
Summary
Data Attributes The pre-defined, synthesizable data attributes are the following: d’LOW: Returns lower array index d’HIGH: Returns upper array index d’LEFT: Returns leftmost array index d’RIGHT: Returns rightmost array index d’LENGTH: Returns vector size d’RANGE: Returns vector range d’REVERSE_RANGE: Returns vector range in reverse order
Data Attributes Example: Consider the following signal: Then