Buses Three sets of wires connect the CPU to memory and I/O devices: Address bus Data bus Control bus Address bus Main Memory CPU Input Output Data bus Note: The Control bus is not shown in this diagram

The Address Bus Carries address information from the CPU to main memory and any other attached devices It is uni-directional i.e. one-way only The width (i.e. the number of wires) determines the number of memory locations the CPU can address A 32 bit address bus has 32 parallel wires each switched on (1) or off (0) that can address locations starting from: 0000 0000 0000 0000 0000 0000 0000 0000 (decimal 0) up to and including address: 1111 1111 1111 1111 1111 1111 1111 1111 (decimal 232 –1) making a total of 232 addresses Every time a wire is added to the width of the address bus, the address range doubles

The Data Bus Carries data to and from the CPU, main memory and any other devices attached It is bi-directional i.e. two-way The number of wires determines the quantity of data that the bus can carry so increasing the number of wires in the data bus increases the quantity of data it can carry A typical 32-bit data bus can carry 32-bits of data or instructions at a time

The Control Bus Signals are sent out and received on the control bus. It is made up of discrete wires each with a specific function: Read and Write signals are initiated to fetch – execute instructions in memory Clock line carries a series of clock pulses at a constant rate to keep the CPU in step (clock rate measured megahertz or gigahertz) Reset halts the execution of the stored program. Internal registers are cleared and the machine reboots. Interrupts are signals usually from I/O devices that halt program execution temporarily. The CPU may ignore them e.g. printer out of paper Non-maskable Interrupts cannot be ignored e.g. power failure