Design for Simple Spiking Neuron Model Mixed-Signal Circuit Design for Simple Spiking Neuron Model Abdullah H. Ozcan Vamshi Chatla ECE 6332 – Fall 2009 University of Virginia

Motivation - 10^11 neurons, each neuron 10-10^5 synapses - Uses less power than your refrigerator light - Power matters; decreasing energy/spike

Outline - ADC Circuit - Neuron Circuit - Conclusion

ANALOG TO DIGITAL CONVERTER

Comparator Stage

Gain Booster Stage Sharper Transitions in the output Full voltage swing 7

XOR Stage

Encoder Stage

Simulation Results

ADC results without gain booster stage

ADC results using gain booster stage

ADC (4bit) Summary - Technology: 0.6 um - Avg Power: 14.2 mW - Max Power: 23.9 mW - Transistors used: 528 - Supply Voltage: 5 V Analog Range: 1 V Sampling Rate: 100 MHz

Izhikevich’s Simple Spiking Neuron Model

VLSI Circuit of Izhikevich’s Model (Jayawan H. B. Wijekon, Piotr Dudek (2007). Spiking and Bursting Firing Patterns of a Compact VLSI Cortical Neuron Circuit, Int. Joint Conference on Neural Networks)

VLSI Circuit (0.35 μm0.6 μm)

Comparator Part

Matlab Results

Circuit Results

Neuron Circuit Summary -Transistors used: 12 -142.1 mW  119.29 mW (% 17 decrease )

Future Work - ADC, minimizing power - DAC circuit to drive synaptic input current - Synaptic Modification Circuit * Levy's learning neuron model

QUESTIONS Thank You!