Channel Sorting with the EDMA Chapter 7 C6000 Integration Workshop T TO Technical Training Organization Copyright © 2005 Texas Instruments. All rights reserved.

Technical Training Organization Outline Background: More EDMA Examples Packed Data vs Sorted Data EDMA Channel Sorting Counter Reload Channel Sorting Procedure Using BSL Exercise Lab 7 T TO Technical Training Organization

Technical Training Organization Outline Background: More EDMA Examples Single-Frame Transfer (Review) Indexed Transfer Multi-Frame Transfer T TO Technical Training Organization

Single-Frame Transfer (Review) (Src: loc_8) 8-bit Values 1 2 3 4 5 6 7 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 8 9 10 11 Goal: Transfer 4 elements from loc_8 to myDest Codec: Codec 8 bits 8 9 10 11 ESIZE 00: 32-bits 01: 16-bits 10: 8-bits 11: rsvd Options Source Destination Index Link Addr Cnt Reload 31 0 Transfer Count 10 # Elements 4 15 16 31 # Frames (less one) FS Frame Sync 0: Off 1: On 00: fixed (no modification) 01: inc by element size 10: dec by element size 11: index Addr Update Mode (SUM/DUM) SUM 01 DUM 00 T TO Technical Training Organization How about going vertical?

Indexed Single Frame Transfer (Src: mem_8) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 8-bit Pixels Codec: Codec 8 bits Procedure Source & Dest Addr Transfer Count Element Size Increment src/dest Frame Sync ________________ 00: fixed (no modification) 01: inc by element size 10: dec by element size 11: index Addr Update Mode (SUM/DUM) ESIZE 00: 32-bits 01: 16-bits 10: 8-bits 11: rsvd FS Frame Sync 0: Off 1: On ESIZE SUM DUM FS Options Source Destination Index Link Addr Cnt Reload 31 0 Transfer Count # Frames # Elements 31 16 15

Indexed Single Frame Transfer (Src: mem_8) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 8-bit Pixels Codec: Codec 8 bits Procedure Source & Dest Addr Transfer Count Element Size Increment src/dest Frame Sync ________________ 00: fixed (no modification) 01: inc by element size 10: dec by element size 11: index Addr Update Mode (SUM/DUM) ESIZE 00: 32-bits 01: 16-bits 10: 8-bits 11: rsvd FS Frame Sync 0: Off 1: On ESIZE 10 SUM DUM 00 FS Options Source Destination Index Link Addr Cnt Reload 31 0 Transfer Count # Frames # Elements 4 31 16 15

Indexed Single Frame Transfer (Src: mem_8) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 8-bit Pixels Codec: Codec 8 bits Procedure Source & Dest Addr Transfer Count Element Size Increment src/dest Frame Sync ________________ Options Source Destination Index Link Addr Cnt Reload 31 0 Transfer Count ESIZE 00: 32-bits 01: 16-bits 10: 8-bits 11: rsvd 00: fixed (no modification) 01: inc by element size 10: dec by element size 11: index Addr Update Mode (SUM/DUM) # Elements 4 15 16 31 # Frames 10 SUM 11 DUM 00 FS Frame Sync 0: Off 1: On

Indexed Single Frame Transfer (Src: mem_8) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 8-bit Pixels Codec: Codec 8 bits Procedure Source & Dest Addr Transfer Count Element Size Increment src/dest Frame Sync Index Options Source Destination Index Link Addr Cnt Reload 31 0 Transfer Count # Elements 4 15 16 31 # Frames ESIZE 01 SUM 11 DUM 00 FS elem index (bytes) Element Index (bytes) Element Index (bytes) 6 T TO Technical Training Organization

Multi-Frame (Block) Transfer 16-bit Pixels 16 bits 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 Codec: Codec T TO Technical Training Organization

Multi-Frame (Block) Transfer Procedure Source & Dest Addr Transfer Count Element Size Increment src/dest Frame Sync ________________ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 Codec: Codec 16-bit Pixels 16 bits Options Source Destination Index Link Addr Cnt Reload 31 0 Transfer Count ESIZE 00: 32-bits 01: 16-bits 10: 8-bits 11: rsvd 00: fixed (no modification) 01: inc by element size 10: dec by element size 11: index Addr Update Mode (SUM/DUM) # Elements 15 16 31 # Frames SUM DUM FS Frame Sync 0: Off 1: On T TO Technical Training Organization

Multi-Frame (Block) Transfer Procedure Source & Dest Addr Transfer Count Element Size Increment src/dest Frame Sync ________________ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 Codec: Codec 16-bit Pixels 16 bits FRAME 1 FRAME 2 FRAME 3 FRAME 4 Options Source Destination Index Link Addr Cnt Reload 31 0 Transfer Count ESIZE 00: 32-bits 01: 16-bits 10: 8-bits 11: rsvd 00: fixed (no modification) 01: inc by element size 10: dec by element size 11: index Addr Update Mode (SUM/DUM) # Elements 4 15 16 31 # Frames 3 01 SUM 11 DUM 00 FS Frame Sync 0: Off 1: On T TO Technical Training Organization

Multi-Frame (Block) Transfer Procedure Source & Dest Addr Transfer Count Element Size Increment src/dest Frame Sync Index 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 Codec: Codec 16-bit Pixels 16 bits Options Source Destination Index Link Addr Cnt Reload 31 0 Transfer Count # Elements 4 15 16 31 # Frames 3 ESIZE 01 SUM 11 DUM 00 FS elem index (bytes) Frame Index (bytes) Element Index (bytes) Frame Index (bytes) 6 Element Index (bytes) 2 T TO Technical Training Organization

Why Does Frame Index = 6 bytes Global Index Register A/B elem index = 16 31 15 2 frame index (bytes) frame index = 6 16-bit Pixels 1 3 4 16-bits 7 8 9 11 14 17 10 FRAME 1 FRAME 2 12 13 18 1 2 3 4 5 6 T TO Technical Training Organization

Technical Training Organization Outline Background: More EDMA Examples Packed Data vs Sorted Data EDMA Channel Sorting Counter Reload Channel Sorting Procedure Using BSL Exercise Lab 7 T TO Technical Training Organization

Technical Training Organization Packed Data Memory L R … AIC23 McBSP (receive) 16-bit mode transfers L RSR RBR DRR R After A/D conversion, the AIC23 shifts out data from alternating channels: Left, then Right This leaves data packed in memory. (You might also say it’s interleaved in memory.) T TO Technical Training Organization What problems could this create?

Technical Training Organization Sorted Data Memory AIC23 McBSP (receive) 16-bit mode transfers L RSR RBR DRR R L … R … Sorting data splits data up by Left or Right channel Often, this is called Channel Sorting T TO Technical Training Organization How do we sort data?

Technical Training Organization Sorted Data Memory AIC23 McBSP (receive) 16-bit mode transfers L EDMA RSR RBR DRR R L … R … You could use the CPU to sort data, or It is more efficient to use the EDMA to sort the data T TO Technical Training Organization How do we configure the EDMA to sort data?

Technical Training Organization Outline Background: More EDMA Examples Packed Data vs Sorted Data EDMA Channel Sorting Counter Reload Channel Sorting Procedure Using BSL Exercise Lab 7 T TO Technical Training Organization

How Channel Sorting Works 1 2 3 4 5 6 7 8 9 10 M cBSP EDMA Left: Right: Frame # 1 Frame Element Count 9 (=10-1) 2 Source McBSP Destination Left Given: Two buffers: Left, Right Buffers each 10 elements long ESIZE = 16-bits EDMA setup: To sort L/R data, we need to set up EDMA with 10 frames, each with 2 elements

How Channel Sorting Works 1 2 3 4 5 6 7 8 9 10 M cBSP EDMA Left: Right: Frame Element Count 9 (=10-1) 2 Source McBSP Destination Left Given: Two buffers: Left, Right Buffers each 10 elements long ESIZE = 16-bits EDMA setup: To sort L/R data, we need to set up EDMA with 10 frames, each with 2 elements After EDMA writes Left[1] how many bytes must be skipped to Right[1]

How Channel Sorting Works 1 2 3 4 5 6 7 8 9 10 M cBSP EDMA Left: Right: 2 bytes Frame Element Count 9 (=10-1) 2 Index 20 Source McBSP Destination Left Given: Two buffers: Left, Right Buffers each 10 elements long ESIZE = 16-bits EDMA setup: To sort L/R data, we need to set up EDMA with 10 frames, each with 2 elements After EDMA writes Left[1] how many bytes must be skipped to Right[1]

How Channel Sorting Works 1 2 3 4 5 6 7 8 9 10 M cBSP EDMA Left: Right: 2 bytes Frame 2 Frame Element Count 9 (=10-1) 2 Index 20 Source McBSP Destination Left Given: Two buffers: Left, Right Buffers each 10 elements long ESIZE = 16-bits EDMA setup: To sort L/R data, we need to set up EDMA with 10 frames, each with 2 elements How many bytes to go back to Left[2]?

How Channel Sorting Works 1 2 3 4 5 6 7 8 9 10 M cBSP EDMA Left: Right: 2 bytes Frame 2 Frame Element Count 9 (=10-1) 2 Index -18 20 Source McBSP Destination Left Given: Two buffers: Left, Right Buffers each 10 elements long ESIZE = 16-bits EDMA setup: To sort L/R data, we need to set up EDMA with 10 frames, each with 2 elements How many bytes to go back to Left[2]?

Technical Training Organization Outline Background: More EDMA Examples Packed Data vs Sorted Data EDMA Channel Sorting Counter Reload Channel Sorting Procedure Using BSL Exercise Lab 7 T TO Technical Training Organization

Counter Reload EDMA 1 2 3 4 5 6 7 8 9 10 M cBSP Left: Right: Frame Element Count 9 2 Index -18 20 Count Reload link Source McBSP Destination Left

Counter Reload EDMA 1 2 3 4 5 6 7 8 9 10 M cBSP Left: Right: Frame Element Count 9 1 Index -18 20 Count Reload link Source McBSP Destination Left

Counter Reload EDMA 1 2 3 4 5 6 7 8 9 10 M cBSP Left: Right: Frame Element Count 9 Index -18 20 Count Reload link Source McBSP Destination Left What happens when the element count goes to zero?

Counter Reload EDMA 1 2 3 4 5 6 7 8 9 10 M cBSP Left: Right: Frame Element Count 9 Index -18 20 Count Reload 2 link Source McBSP Destination Left What happens when the element count goes to zero? There’s a register for this

Counter Reload EDMA 1 2 3 4 5 6 7 8 9 10 M cBSP Left: Right: Frame Element Count 8 2 Index -18 20 Count Reload link Source McBSP Destination Left What happens when the element count goes to zero? There’s a register for this

Counter Reload EDMA 1 2 3 4 5 6 7 8 9 10 M cBSP Left: Right: Frame Element Count 8 1 Index -18 20 Count Reload 2 link Source McBSP Destination Left What happens when the element count goes to zero? There’s a register for this

Counter Reload EDMA 1 2 3 4 5 6 7 8 9 10 M cBSP Left: Right: Frame Element Count 8 Index -18 20 Count Reload 2 link Source McBSP Destination Left What happens when the element count goes to zero? There’s a register for this

Counter Reload EDMA 1 2 3 4 5 6 7 8 9 10 M cBSP Left: Right: Frame Element Count 7 2 Index -18 20 Count Reload link Source McBSP Destination Left What happens when the element count goes to zero? There’s a register for this

Technical Training Organization Counter Reload 1 2 3 4 5 6 7 8 9 10 M cBSP EDMA Left: Right: Frame Element Count 7 1 Index -18 20 Count Reload 2 link Source McBSP Destination Left What happens when the element count goes to zero? There’s a register for this T TO Technical Training Organization The procedure for setting up Channel Sorting...

Channel Sorting Configuration To enable EDMA channel sorting, reconfigure the EDMA as shown below: Options: Source: Transfer Count: Destination: Index: Count Reload / Link: DUM BUFFSIZE - 1 # of Buffers = 2 1st Buffer’s Address − (BUFFSIZE -1) * NBYTES BUFFSIZE * NBYTES # of Buffers 31 16 15 The Frame index on this slide assumes that only 2 buffers are used. If you use –(BUFFSIZE-1) * NBYTES, this assumes only 2 buffers. If you are channel sorting 3 or more buffers, you can use a more general formula such as: Frame index = - (BUFFSIZE * NBYTES) * (NUMBUFS-1) + NBYTES NBYTES = # of bytes per element Destination Update Mode (DUM): 00: fixed (no modification) 01: inc by element size 10: dec by element size 11: index T TO Technical Training Organization

Technical Training Organization Outline Background: More EDMA Examples Packed Data vs Sorted Data EDMA Channel Sorting Counter Reload Channel Sorting Procedure Using BSL Exercise Lab 7 T TO Technical Training Organization

Technical Training Organization Board Support Library Board Support Library (BSL) Board-level routines supporting DSK-specific hardware Higher level of abstraction than CSL BSL functions make use of CSL Codec Leds Switches Flash Chip Support Library (CSL) Low-level routines supporting on-chip peripherals Serial Ports EDMA EMIF Cache Timers Etc. TI DSP Higher level of abstraction than CSL eg. AD535 functions configure both McBSP and AD535 for you Increased Portability Common functions for TI’s DSP 3rd parties and customers Supports all ‘C6000 uP, no re-coding periph’s for ‘C6x migration Where possible, same API’s used for C5000 and C6000 DSP families Increased Reliability, Decreased Maintenance Code shared by TI and many users Large installed user base helps eliminate bugs T TO Technical Training Organization Let’s use BSL to check the status of a DIP switch…

Interfacing with the DSK’s DIP Switches #include <dsk6713.h> #include <dsk6713_dip.h> Add these include files: C:\CCStudio_v3.1\c6000\dsk6713\lib\dsk6713bsl.lib Add this library to your project: if (DSK6713_DIP_get(0) == 0){ mySample = 0; }; Use the DIP_get API to read the DSK switches (0-3): Switch Position Return Value Down Up 1 T TO Technical Training Organization Note: If you’re using the 6416 DSK, just change 6713 to 6416.

Technical Training Organization Outline Background: More EDMA Examples Packed Data vs Sorted Data EDMA Channel Sorting Counter Reload Channel Sorting Procedure Using BSL Exercise Lab 7 T TO Technical Training Organization

Technical Training Organization Exercise: Background Update the destination EDMA configuration for channel sorting. This exercise should take 10 minutes. These are the data declarations and references used in Lab 7: // ======== Declarations ======== #define BUFFSIZE 32 // ======== References ======== extern short gBufRcvL[BUFFSIZE]; extern short gBufRcvR[BUFFSIZE]; extern short gBufXmtL[BUFFSIZE]; extern short gBufXmtR[BUFFSIZE]; extern SINE_Obj sineObjL; extern SINE_Obj sineObjR; // ======== Global Variables ======== EDMA_Handle hEdmaRcv; EDMA_Handle hEdmaReloadRcv; EDMA_Handle hEdmaXmt; EDMA_Handle hEdmaReloadXmt; short gXmtTCC; short gRcvTCC; Buffers for our Left and Right channels T TO Technical Training Organization

Technical Training Organization Exercise: Step 1 Modify the configuration from our previous lab exercise: EDMA_Config gEdmaConfigRcv = { EDMA_OPT_RMK( EDMA_OPT_PRI_LOW, // Priority? EDMA_OPT_ESIZE_16BIT, // Element size? EDMA_OPT_2DS_NO, // 2 dimensional source? EDMA_OPT_SUM_NONE, // Src update mode? EDMA_OPT_2DD_NO, // 2 dimensional dest? EDMA_OPT_DUM_INC, // Dest update mode? EDMA_OPT_TCINT_YES, // Cause EDMA interrupt? EDMA_OPT_TCC_OF(0), // Transfer complete code? EDMA_OPT_LINK_YES, // Enable link parameters? EDMA_OPT_FS_NO // Use frame sync? ), ... T TO Technical Training Organization

Technical Training Organization Exercise: Step 1 Modify the configuration from our previous lab exercise: EDMA_Config gEdmaConfig = { EDMA_OPT_RMK( EDMA_OPT_PRI_LOW, // Priority? EDMA_OPT_ESIZE_16BIT, // Element size? EDMA_OPT_2DS_NO, // 2 dimensional source? EDMA_OPT_SUM_NONE, // Src update mode? EDMA_OPT_2DD_NO, // 2 dimensional dest? EDMA_OPT_DUM_INC, // Dest update mode? EDMA_OPT_TCINT_YES, // Cause EDMA interrupt? EDMA_OPT_TCC_OF(0), // Transfer complete code? EDMA_OPT_LINK_YES, // Enable link parameters? EDMA_OPT_FS_NO // Use frame sync? ), ... IDX T TO Technical Training Organization

Exercise: Steps 2-3 Set Transfer Counter: EDMA_CNT_RMK( Using the declarations and variables from the previous slide, fill in the correct values. Use the symbol BUFFSIZE rather than just the value, in case we change the buffer size later. Refer back to page 7-17 for a hints on how to fill in the blanks. 2 Set Transfer Counter: EDMA_CNT_RMK( EDMA_CNT_FRMCNT_OF( ), EDMA_CNT_ELECNT_OF( ) ), Set Destination to first buffer’s address EDMA_DST_OF( ), 3

Exercise: Steps 2-3 Set Transfer Counter: EDMA_CNT_RMK( Using the declarations and variables from the previous slide, fill in the correct values. Use the symbol BUFFSIZE rather than just the value, in case we change the buffer size later. Refer back to page 7-17 for a hints on how to fill in the blanks. 2 Set Transfer Counter: EDMA_CNT_RMK( EDMA_CNT_FRMCNT_OF( BUFFSIZE – 1 ), EDMA_CNT_ELECNT_OF( ) ), Set Destination to first buffer’s address EDMA_DST_OF( ), 3

Exercise: Steps 2-3 Set Transfer Counter: EDMA_CNT_RMK( Using the declarations and variables from the previous slide, fill in the correct values. Use the symbol BUFFSIZE rather than just the value, in case we change the buffer size later. Refer back to page 7-17 for a hints on how to fill in the blanks. 2 Set Transfer Counter: EDMA_CNT_RMK( EDMA_CNT_FRMCNT_OF( BUFFSIZE – 1 ), EDMA_CNT_ELECNT_OF( 2 ) ), Set Destination to first buffer’s address EDMA_DST_OF( ), 3

Technical Training Organization Exercise: Steps 2-3 Using the declarations and variables from the previous slide, fill in the correct values. Use the symbol BUFFSIZE rather than just the value, in case we change the buffer size later. Refer back to page 7-17 for a hints on how to fill in the blanks. 2 Set Transfer Counter: EDMA_CNT_RMK( EDMA_CNT_FRMCNT_OF( BUFFSIZE – 1 ), EDMA_CNT_ELECNT_OF( 2 ) ), Set Destination to first buffer’s address EDMA_DST_OF( gBufRcvL ), 3 T TO Technical Training Organization

Technical Training Organization Exercise: Step 4 Using the declarations and variables from the previous slide, fill in the correct values. Use the symbol BUFFSIZE rather than just the value, in case we change the buffer size later. Refer back to page 7-17 for a hints on how to fill in the blanks. Set Index register: EDMA_IDX_RMK( // Negative Frame Index to move us back to the previous channel EDMA_IDX_FRMIDX_OF( ), // Positive Element Index to move us to the next channel EDMA_IDX_ELEIDX_OF( ) ), 4 T TO Technical Training Organization

Technical Training Organization Exercise: Step 4 Using the declarations and variables from the previous slide, fill in the correct values. Use the symbol BUFFSIZE rather than just the value, in case we change the buffer size later. Refer back to page 7-17 for a hints on how to fill in the blanks. Set Index register: EDMA_IDX_RMK( // Negative Frame Index to move us back to the previous channel EDMA_IDX_FRMIDX_OF( -(BUFFSIZE*2)+ 2 ), // Positive Element Index to move us to the next channel EDMA_IDX_ELEIDX_OF( ) ), 4 T TO Technical Training Organization

Technical Training Organization Exercise: Step 4 Using the declarations and variables from the previous slide, fill in the correct values. Use the symbol BUFFSIZE rather than just the value, in case we change the buffer size later. Refer back to page 7-17 for a hints on how to fill in the blanks. Set Index register: EDMA_IDX_RMK( // Negative Frame Index to move us back to the previous channel EDMA_IDX_FRMIDX_OF( -(BUFFSIZE*2)+ 2 ), // Positive Element Index to move us to the next channel EDMA_IDX_ELEIDX_OF( BUFFSIZE * 2 ) ), 4 T TO Technical Training Organization

Technical Training Organization Exercise: Step 5 Element Reload: EDMA_RLD_RMK( // Number of elements, should be the same as Element Count EDMA_RLD_ELERLD_OF( ), // We’ll replace “0” later using EDMA_link() EDMA_RLD_LINK_OF(0) ) 5 T TO Technical Training Organization

Technical Training Organization Exercise: Step 5 Element Reload: EDMA_RLD_RMK( // Number of elements, should be the same as Element Count EDMA_RLD_ELERLD_OF( 2 ), // We’ll replace “0” later using EDMA_link() EDMA_RLD_LINK_OF(0) ) 5 T TO Technical Training Organization

Technical Training Organization Exercise: Step 6 Complete the “if” condition below using BSL: If DIP switch 0 is on (down), then add sine-wave values to the Left and Right receive buffers if ( ) { SINE_add(&sineObjL, gBufRcvL, BUFFSIZE); SINE_add(&sineObjR, gBufRcvR, BUFFSIZE); } T TO Technical Training Organization

Exercise: Step 6 Complete the “if” condition below using BSL: If DIP switch 0 is on (down), then add sine-wave values to the Left and Right receive buffers if ( DSK6713_DIP_get(0) == 0 ) { SINE_add(&sineObjL, gBufRcvL, BUFFSIZE); SINE_add(&sineObjR, gBufRcvR, BUFFSIZE); } T TO Technical Training Organization * Replace DSK6713 with DSK6416 for the C64x DSK

Technical Training Organization Outline Background: More EDMA Examples Packed Data vs Sorted Data EDMA Channel Sorting Counter Reload Channel Sorting Procedure Using BSL Exercise Lab 7 T TO Technical Training Organization

Lab 7: Use Channel Sorting McBSP EDMA CPU DIP0 L Rcv RCVCHAN + ADC gBufRcv R COPY R Xmt XMTCHAN DAC gBufXmt L Use EDMA to sort data into separate channels (L, R) T TO Technical Training Organization

Technical Training Organization Click Here for Chapter 8 Double Buffers Chapter 7: Optional Topics McBSP’s Multi-Channel mode with EDMA Channel Sorting Additional HWI topics NMIE ICR, ISR ISTP Interrupt Selector Saving Context (3 methods) HWI Dispatcher Using the interrupt keyword HWI_enter/_exit macros in Assembly Chaining EDMA channels Interrupts and the DMA (vs. EDMA) Secondary Control Register DMA pins T TO Technical Training Organization

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