M2 M1 Vbb Vin CL M4 M3 Vyy Vxx VDD VDD Vo<Vxx+|Vt3| flip up-down

Slides:

Advertisements

Similar presentations

Differential Amplifiers

Advertisements

Lecture 24 ANNOUNCEMENTS OUTLINE

Operational Amplifier (2)

1 EE 501 Fall 2009 Design Project 1 Fully differential multi-stage CMOS Op Amp with Common Mode Feedback and Compensation for high GB.

OpAmp (OTA) Design The design process involves two distinct activities: Architecture Design –Find an architecture already available and adapt it to present.

Advanced opamps and current mirrors

CMOS AMPLIFIERS Simple Inverting Amplifier Differential Amplifiers Cascode Amplifier Output Amplifiers Summary.

CMOS AMPLIFIERS Simple Inverting Amplifier Differential Amplifiers Cascode Amplifier Output Amplifiers Summary.

2. CMOS Op-amp설계 (1).

Analog CMOS Integrated Circuit Design Opamp Design

UNIT -V IC MOSFET Amplifiers.

Basic Block Diagram of Op-Amp

Microelectronic Circuits Chapter 9. Operational Amplifiers

BIOELECTRONICS 1 Lec8: Operational Amplifiers and Applications By

Feedback No feedback : Open loop (used in comparators)

Alexander-Sadiku Fundamentals of Electric Circuits

Examples of Negative Feedback Applications: A) Inverting Amplifiers

Lecture 13 High-Gain Differential Amplifier Design

Subject : Analog Electronics

Microelectronic Circuits Chapter 9. Operational Amplifiers

OSCILLATOR & Operational Amplifier

Analog Integrated Circuits Laboratory

Design: architecture selection plus biasing/sizing

Voltage doubler for gate overdrive

VDD M3 M1 Vbb Vin CL Rb Vo VDD Vo Vb3

CASCODE AMPLIFIER.

Basic Amplifiers and Differential Amplifier

Fully differential op amps

Last time Small signal DC analysis Goal: Mainly use CS as example

CMOS Analog Design Using All-Region MOSFET Modeling

Last time Large signal DC analysis Current mirror example

More DAC architectures

DAC architectures.

vs vb cc VDD VDD VDD M9 M12 M11 vo Iref M1 M2 vin vin+= voQ CL vf=vin

OpAmp (OTA) Design The design process involves two distinct activities: Architecture Design Find an architecture already available and adapt it to present.

M2 M1 Vbb Vin CL M4 M3 Vyy Vxx VDD VDD Vo<Vxx+|Vt3| flip up-down

Input common mode range drop

CMOS Analog Integrated Circuits Part 3. CMOS Single Stage Amplifiers

cc cc vbp vbp vbn VDD VDD VDD VDD VDD M16 M4 M3 M4 M13 Rbp vo+ CL vo-

cc cc vbp vbp vbn VDD VDD VDD VDD VDD M16 M14 M3 M4 M13 Rbp vo+ CL vo-

M2 M1 Vbb Vin CL M4 M3 Vyy Vxx VDD VDD Vo<Vxx+|Vt3| flip up-down

VDD VDD Vo<VG6+|Vt6| =VDD - |Vtp| - 2Veff M7 M5 M8 M6 vo

For a differential amplifer: vin+=vic+vid/2, vin-=vic-vid/2

Op Amp Specs and Test Benches

LOW VOLTAGE OP AMPS We will cover: Methodology:

Lecture 13 High-Gain Differential Amplifier Design

vs vin- vin+ vbp vbn vbn vbb vbb VDD VDD M9 M12 M1 M2 v- v+ Iref M3 M4

Last time Reviewed 4 devices in CMOS Transistors: main device

Miller equivalent circuit

Common mode feedback for fully differential amplifiers

Basic current mirror Small signal: Rin = 1/(gm1+gds1)  1/gm1

DAC architectures.

Recall Lecture 10 Introduction to BJT 3 modes of operation

Types of Amplifiers Common source, input pairs, are transconductance

Input common mode range

VDD M2 M1 Vbb Vin CL RL Vo VDD Vo Vb2

Common mode feedback for fully differential amplifiers

Common source output stage:

Differential Amplifier

vs vb cc VDD VDD VDD M9 M12 M11 vo Iref M1 M2 vin vin+= voQ CL vf=vin

Complementary input stage with rail-to-rail Vicmr and constant gm

Folded cascode stage: summing current and convert to voltage

Rail-to-rail Input Stage

LOW VOLTAGE OP AMPS We will cover: Methodology:

Differential Amplifier

VDD Vin+ CL Vin- Vb3 folded cascode amp Vb2 Vb1 Vb4 Vb5.

Ch. 5 – Operational Amplifiers

Alexander-Sadiku Fundamentals of Electric Circuits

Lecture 24 ANNOUNCEMENTS OUTLINE

Ch. 5 – Operational Amplifiers

Presentation transcript:

M2 M1 Vbb Vin CL M4 M3 Vyy Vxx VDD VDD Vo<Vxx+|Vt3| flip up-down for source Rb M2 Vbb CL M1 Vin connecting D1 to S2 cascoding Vo> Vbb-Vt2 ro = rop||ron, Av=-gm1*ro

VDD VDD flip left-right to get this differential telescopic cascoded amplifier M7 M5 Vyy Vxx Vo<Vxx+|Vt3| M8 M6 vo- vo+ CL M3 M4 Vbb CL M1 M2 vin+ vin- Vs Vo> Vbb-Vt2 Tail current to change gnd to virtual gnd

Let vin+ = Vic + ½ vid, vin- = Vic - ½ vid The cross source: Vs = Vic – VGS1Q. Left half circuit same as two slides back, but with vin = ½ vid. So vo- = - gm1ro-(½ vid), where ro- = ro5,7||ro1,3. Similarly, vo+ = - gm1ro+(-½ vid), where ro+ = ro6,8||ro2,4. Hence: vod = gm1rovid Av = vod/vid = gm1ro where ro = ro- = ro+

Slew rate For Vo+: SR+ = I8Q/CL SR- = (I2max-I8Q)/CL But I2max=Itail, I8Q=Itail/2 So, SR+ = SR- =Itail/2CL Similarly for Vo-, SR+ = SR- =Itail/2CL For Vod, SR+ = SR- =Itail/CL

ICMR M3 M4 Vbb What is Vicmax? VD1 = Vbb-Vt3-Veff3 For M1 in saturation, need VD1>VG1Q–Vt1 =Vic–Vt1. So, Vic<Vbb-Vt3-Veff3+Vt1 Vicmax=Vbb-Veff3 What is Vicmin? Vs>Veff9 for M9 in saturation. Vic>Veff9+Veff1+Vt1 Vicmin=Veff9+Veff1+Vt1 M1 M2 vin+ vin- Is M1 M2 vin+ vin- M9

VDD VDD ICMR: Vicmin=Veff5+Veff1+Vt1 Vicmax=VDD-Veff3+Vt1 Total range: VDD-Veff3-Veff1-Veff5 Vyy M3 M4 Vo<VDD-Veff4 vo- vo+ CL CL M1 M2 OSR: Vic-Vt2 to VDD-Veff4 Total range: VDD-Vic-Veff4+Vt2 vin+ vin- Vs M5 Vo>Vic-Vt2

VDD VDD Diode connection to turn diff out to single-ended output  M7 M5 M8 Vo<VG6+|Vt6| M6 vo Same ICMR. But Vo range is different. VG6=VDD-2Vtp-2Veff M3 M4 CL Vbb M1 M2 vin+ vin- Vo>Vbb-Vt2 Same Av, ro

VDD VDD ICMR: Vicmin=Veff5+Veff1+Vt1 Vicmax=VDD-Veff3-Vt3+Vt1 Total range: VDD-Vt3-Veff3-Veff1-Veff5 Vyy M3 M4 Vo<VDD-Veff4 vo- vo+ CL CL M1 M2 OSR: Vic-Vt2 to VDD-Veff4 Total range: VDD-Vic-Veff4+Vt2 vin+ vin- Vs M5 Vo>Vic-Vt2

VDD VDD Vo Vo Folded cascode

VDD Vin CL Vbb flip up-down for I sources VDD M1 Vin CL M2 Vbb connecting n-D to p-S

VDD VDD folded cascode amp Vbb Vin+ Vin- CL

Output swing range and input common mode range are now decoupled. OSR: VDD-4Veff ICMR: 2Veff+Vt1 to VDD-Veff +Vt1 VDD-3Veff But, if Vic cannot exceed VDD, ICMR: 2Veff+Vt1 to VDD VDD-2Veff-Vt1

Miller equivalent circuit I2 =Y(V2-V1) =Y(V2+V2/A) =(1+1/A)YV2  Y2=(1+1/A)Y Y Chapter 4 Figure 15 I1=I=Y(V1-V2) =Y(V1+AV2) =(1+A)YV1 Y1=(1+A)Y

v2 = -Av1 v2 Agm1R2