Instruction Set Architectures Continued

Expanding Opcodes & Instructions

Expanding vs Fixed Opcodes Fixed Size Opcode: Every type of instruction uses same opcode size MIPS instruction format:

Fixed Opcodes Expanding Opcode: Different instructions = different length opcodes

Expanding Opcodes Expanding Opcode : Special opcode means : keep reading xxx = any pattern but all 1's X X X X X X X X 1 1 1 1 1 1 1 1 X X X X 1 1 1 1 1 1 1 1 1 1 1 1 X X X X

Expanding Opcode Expanding Opcode : More efficient use of space Intel : 0F = keep reading : http://ref.x86asm.net/coder64.html

Expanding Opcodes ARM Expanding / Split OpCode

Expanding Instructions Every instruction does not have to be the same size:

Expanding Instructions Might decode based on instruction Java bytecode bipush #immediate : +0 bipush +1 immediate +2 next instruction 7 8 9 10 11

Expanding Instructions Might decode based on instruction 3 possibilities:

Expanding Instructions Intel 32 bit code : 1-6 bytes 64 bit code : up to 15 bytes:

Addressing Modes

Addressing Addressing : the ways we are allowed to refer to values and locations

Immediate Addressing Immediate Addressing: Value to load hard coded in instruction Immediate

Direct Addressing Direct Addressing : Instruction contains the memory address that has value to load

Indirect Addressing: Register Register Indirect Addressing: A register contains the address of data to load

Indirect Addressing: Register Register Indirect Addressing Use: Pointers: C++ Assembly int a, c; @assume a = r1 and c = r2 int b*; @assume b = r3 b = &a; @assume loads a's address into r3 c = *b; LDR r2, [r3]

Indirect Addressing: Register & Offset Register Indirect With Offset Addressing: Start with address in register, add immediate offset

Indirect Addressing: PC & Offset PC Relative Addressing: Register Indirect with Offset where register is always PC Immediate

Indirect Addressing: Register & Index Register Indirect With Index (Variable Offset): Start with address in register, add offset amount from another register R2

Addressing Memory Indirect Addressing: Register holds address of memory where address is R

Memory Indirect Uses Jump to nth record of regularly sized structure can be done with: address = base + index * size Register Indirect With Offset

Memory Indirect Addressing Irregular structure needs lookup table to store start addresses of each item: Array of Pointers

Memory Indirect Addressing Memory indirect allows access to list[2] in one instruction:

Other Uses Jump tables used for Efficient switch statements enum operation {LOAD, STORE, ADD}; Switch (operation) { case LOAD: LOAD code; break: case STORE: STORE code; break: case ADD : ADD code; break: }

Other Uses Jump tables used for Efficient switch statements OOP Function Lookup

VTables Vtable : Table of function pointers for virtual functions

VTables Virtual Dispatch: Start with object address Value at that address is address of vtable Each function is that address + known offset

Special Tricks

ARM Addressing Tricks Fun Fact ARM Provides 3 Varients of offset addresses Temporarily add offset Add offset and store changed address Add change after using current value

Atomic Read/Write Fun Fact Multiprocessor systems have to allow for atomic series of actions Special instructions check/set a memory value in one step

Loop Instructions Fun Fact Loops get run a lot Combine Increment, compare and branch into one instruction

Fun Fact ARM Thumb Mode Thumb Mode 16 bit instructions