Testing of the EMCO Prototype Boards

Slides:

Advertisements

Similar presentations

Routed Systems Presented by: Bassam Najar, Design Engineer Butler International Inc.

Advertisements

USB Controlled IO Module Jon Knoll Dave Wolowicz Sponsored by: Dr. Kin Li A 499a Project.

Ports, Cables and Connectors

04/02/2004 az Outer Tracker Distribution Boxes 1 EFNI H K Outer Tracker Distribution Boxes Ad Berkien Tom Sluijk Albert Zwart.

CMS WeekDec 2002E. Hazen HF Electronics Status Report E. Hazen, J. Rohlf, E. Machado Boston University.

CPR2 Optical Cables Joey Huston Michigan State University …taking optical signals from edge of CPR/crack detectors to PMT boxes mounted on back of wedges.

Design bud box for super logics July Design for bud box We need to put the superlogics inside bud box and make a hole or other connection part.

Figure Figure 18-1 part 1 Figure 18-1 part 2.

Walls crates cables gas chambers electronics CERN adb.

Large Cell Scope Pictures, Part II HV Gnd 1nF Large Cell Tube Anode signal Phi Cathode signal scope S1 S2 S1 S2 This is a follow-up on Richard’s measurement.

Motherboard Form Factor. Motherboard The motherboard is the main circuit board inside the PC. It holds the CPU and memory, provides expansion slots for.

PMT Modular HV Supply Design Status December 2003 Madison Instrumentation Workshop Nobuyoshi Kitamura UW-Madison.

Preliminary Design Review May 20, 2003 PMT HV Base Board Engineering Requirements Nobuyoshi Kitamura SSEC / UW-Madison.

10 Easy steps to building your computer By Chris Holzworth & Michael Barnett.

Chiho Wang ATLAS TRT Duke University Dubna, May Fuse Box Production Chiho Wang/Jack Fowler.

Iowa LED system for CMS HCAL By M. Miller Y. Onel University of Iowa, Iowa City, IA CMS Meeting, CERN December 1-8, 2001.

TE-MPE-EP, VF, 11-Oct-2012 Update on the DQLPU type A design and general progress. TE-MPE Technical Meeting.

1 PMT Base Prototypes Comparison using DOMMB ATWD August 6, 2003 Nobuyoshi Kitamura UW-Madison / SSEC.

Laguna Beach, CA March 30-April 1, 2003 PMT HV Base Board Development Nobuyoshi Kitamura SSEC / UW-Madison.

LHCC, V0, Sept The V0 detector (Mexico Lyon collaboration)  Segmentation  Simulated performances secondaries / beam-gas  Counters design 1 /

Anatoli Konoplyannikov Design and integration of HV, LED monitoring and calibration system for HCAL Overview of the subsystems design High voltage.

First, let’s review the structure and use of a breadboard.

Figure 1: ICD Single Channel Block Diagram Schematic PMT High Voltage Supply (see Figure 4 & 4a) LED Pulser PMT Calibration (see Figure 6) ICD Scintillator.

V. Cindro, Jožef Stefan Institute, Ljubljana, Slovenia DAQ, DCS, Power Supply and Cables Review CERN, March Electrical PP1 Basic features Electrical.

HBD FEM the block diagram preamp – FEM cable Status Stuffs need to be decided….

LOGIC GATES. Electronic digital circuits are also called logic circuits because with the proper input, they establish logical manipulation paths. Each.

Some questions:  In which order cables will be put ?  Who, where will put PS signal cables in bundles ?  Which kind of cable binders: velcro or panduit.

1 4 PCB: LEFT TOP 115 channels, LEFT BOTTOM (115), RIGHT TOP (106), RIGHT BOTTOM (106). For LEFT TOP board 115 channels we have: 115 smd connectors (AMP.

HV Connector and Endcaps, Part II After the discussion at this week’s LST meeting we went back to the drawing board and tried to implement Mauro’s suggestion.

PMT HV Base Prototypes Evaluation Instrumentation Workshop LBNL July 23-24, 2003 Nobuyoshi Kitamura University of Wisconsin-Madison SSEC.

Sophisticated Design Automatic Tailgate Final Presentation December 5, 2001 Ted Akiskalos June Doan Tarek Elshazly Maggie Kim David Nimitz Sharon Ramey.

ROBOX with Multi Anode PMT’s Status and plans A.Mestvirishvili, I. Schmidt, S. Sen, F. Ozok University of Iowa.

IPC In-Circuit Test Fixtures In-circuit test fixtures are commonly called bed-of-nails fixtures. A bed-of- nails fixture is a device with.

Proposal for the assembly of the PHOBOS ring counters (H.P. 3/20/98) I would like to propose and discuss with you an alternative layout and assembly procedure.

Specifications Asic description Constraints Interface with PDM board Schedule Summary.

Computer Components Natasha Baker.

Single Module Tests (electrical) Inspect connectors and cables for visible damage C-measurement: make sure all pads are correctly connected HV test (1.5.

1 Calorimeters LED control LHCb CALO meeting Anatoli Konoplyannikov /ITEP/ Status of the calorimeters LV power supply and ECS control Status of.

Assumptions: Cockcroft-Walton photomultiplier bases are the same for all ECAL sections Digital to analog converters are installed on the distribution boards.

2003/Nov/16 version #1.Page 1 Aerogel HV cable assembling procedures (for W1-SOUTH-side of 80 Aerogel Boxes) Phenix high-pt PID upgrade team Original version(Oct/11/’03):

EOS and type I Prototype Service Modules Mike Dawson (Oxford), Rob Gabrielczyk (RAL), John Noviss (RAL) 19 th January 2015 ATLAS Upgrade Activities, Oxford.

Ports and Connectors By Karina Hackett Overview: Ports are also known as sockets, and are located at the back of a system unit. Connectors are the parts.

H. Katajisto RE EDR 10/10/02 Enclosures for the RPC Link Boards Outline Introduction Periphery General Services Components, materials Manufacture, Assembly.

STEREO IMPACT SEP Critical Design Review 2002-Nov-21/22 TvR1 SEP Mechanical Design Sandy Shuman, GSFC ) Tycho.

FEE Electronics progress PCB layout progress VHDL progress in TBU Prototype fixture for software 9th June 2009.

SeaPerch Electrical System. Electrical System Overview Assemble the control box. Make the Cat5 connector. Wire the motors to the tether. Wire the control.

DOM Electronics (Digital Optical Module) 1 WPFLElectronics PPMDOM ElectronicsF. Louis.

Specifications Asic description Constraints Interface with PDM board Planning Summary.

ATLAS TRT Duke University CERN, Feb Fuse Box Status Duke University.

HE FEE Boards production status 26 th May 2016 Mandakini Patil 1.

E.Guschin (INR,Moscow) 20 January 2006PS/SPD meeting CERN PS/SPD LED monitoring system status In December 2005: –All splitters and drivers are delivered.

MADEIRA Valencia report V. Stankova, C. Lacasta, V. Linhart Ljubljana meeting February 2009.

Calibration and monitoring system for FPD to check the response of the MAPMT and L0PMT as it involves in time ( + to see if we have any dead channels +

SeaPerch Electrical System

ECAL Front-end development

HF Test station at P5 A.Mestvirishvili.

Mini-drawers, FE-ASIC , Integrator

PMT cabling Gian Luca Raselli INFN Pavia

High-Voltage Supply Requirements Review

FIRELEC Migration Solution

University of Wisconsin-Madison / SSEC

Front-end electronic system for large area photomultipliers readout

Pierluigi Paolucci - I.N.F.N. Naples

Electronics: Demod + 4Q FE

NPS/CPS/COMCAL - Readout

Output Chapter 6.

HUBER+SUHNER ACS Confidential ACS May 2013.

How to build a computer.

Characterization of Wired-OR prototype board

SeaPerch Electrical System

Presentation transcript:

Testing of the EMCO Prototype Boards The following are expected from EMCO by the end of December, 2003: Four (4) HV Control Boards (7930A mounted on 7954) without the ribbon connector. Four (4) PMT HV Base Boards (7931) We are to tell EMCO whether the prototypes are acceptable by January 9, 2004. We are expecting a drawing of the Base (7931) from EMCO by the time the boards are received. The EMCO drawing for the HV generator (7930A) is attached at the end of this file. The assembly drawing (7930A plus 7954) is attached also. For the design / specification information, look at: http://amanda.wisc.edu/kitamura/HVM/HVM1.htm 12/16/2003 N. Kitamura

Tests Verify if the board mounting holes are correct, and the cable lengths are okay (in the DOM). HV Control Board The boards will be delivered without the ribbon connector. The boards will have a footprint for a 24 pin connector. Attach a 20-pin connector to this footprint (see the figure next page). Electrical Total power consumption Digital functions HV_DISABLE HV_ONOFF HV_ID DAC writes ADC reads HV Output HV (measure) PMT Base Board Total bleeder resistance (measure) PMT pulse measurement with a scope (Use a PMT socket and the cable adapter box. Set this up inside the dark box.) 12/16/2003 N. Kitamura

Component Side View Pin #1 Install 20-pin connector for these signals. Board edge DGND 21 22 DGND HV_DISABLE 23 24 HV_DISABLE “HV_DISABLE” is a 3.3V positive high logic (HV is disabled when connected to +3.3V). +3.3V is available in the DOMMB-Flasher Board connector. 12/16/2003 N. Kitamura