COMP3221: Microprocessors and Embedded Systems

Slides:



Advertisements
Similar presentations
COMP3221: Microprocessors and Embedded Systems
Advertisements

Accessing Atmega32 SRAM data memory
ECE 353 Introduction to Microprocessor Systems Michael G. Morrow, P.E. Week 6.
COMP3221: Microprocessors and Embedded Systems
COMP3221: Microprocessors and Embedded Systems--Lecture 7 1 COMP3221: Microprocessors and Embedded Systems Lecture 7: Arithmetic and logic Instructions.
COMP3221: Microprocessors and Embedded Systems--Lecture 7 1 COMP3221: Microprocessors and Embedded Systems Lecture 7: Arithmetic and logic Instructions.
COMP3221: Microprocessors and Embedded Systems Lecture 12: Functions I Lecturer: Hui Wu Session 2, 2005.
COMP3221: Microprocessors and Embedded Systems--Lecture 8 1 COMP3221: Microprocessors and Embedded Systems Lecture 8: Program Control Instructions
TK 2633 Microprocessor & Interfacing Lecture 3: Introduction to 8085 Assembly Language Programming (2) 1 Prepared By: Associate Prof. Dr Masri Ayob.
Room: E-3-31 Phone: Dr Masri Ayob TK 2633 Microprocessor & Interfacing Lecture 1: Introduction to 8085 Assembly Language.
COMP3221: Microprocessors and Embedded Systems--Lecture 4 1 COMP3221: Microprocessors and Embedded Systems Lecture 4: Number Systems (II)
COMP3221: Microprocessors and Embedded Systems
COMP3221: Microprocessors and Embedded Systems--Lecture 9 1 COMP3221: Microprocessors and Embedded Systems Lecture 9: Data Transfer Instructions
COMP3221: Microprocessors and Embedded Systems Lecture 13: Functions II Lecturer: Hui Wu Session 2, 2005.
INSTRUCTION SET OF MICROPROCESSOR 8085
Module 10 Adapted By and Prepared James Tan © 2001.
Instruction Set Design by Kip R. Irvine (c) Kip Irvine, All rights reserved. You may modify and copy this slide show for your personal use,
Computer Architecture Lecture 13 – part 2 by Engineer A. Lecturer Aymen Hasan AlAwady 7/4/2014 University of Kufa - Information Technology Research and.
Microprocessor Dr. Rabie A. Ramadan Al-Azhar University Lecture 7.
© Mike Stacey 2008 Single Chip Microcontrollers 7765J Mount Druitt College of TAFE Lesson 3 Arrays in ASM, Bubble Sort algorithm.
Computer Architecture Lecture 11 by Engineer A. Lecturer Aymen Hasan AlAwady 10/3/2014 University of Kufa - Information Technology Research and Development.
Lecture Set 4 Programming the 8051.
Stacks & Subroutines Content. Stacks A stack is a Last In First Out (LIFO) buffer containing a number of data items usually implemented as a block of.
Richard P. Paul, SPARC Architecture, Assembly Language Programming, and C Chapter 8 – Machine Instructions These are lecture notes to accompany the book.
ECE 447 Fall 2009 Lecture 4: TI MSP430 Architecture and Instruction Set.
COMP3221: Microprocessors and Embedded Systems--Lecture 10 1 COMP3221: Microprocessors and Embedded Systems Lecture 10: Shift and Bit-set Instructions.
BRANCHES SUBROUTINES AND MEMORY USAGE AVR Assembler M. Neil - Microprocessor Course 1.
The AVR microcontroller
Universal College Of Engineering & Technology UCET 1/27.
“ INSTRUCTIONS SET OF AVR MICROCONTROLLER ” SIGMA INSTITUTE OF ENGINEERING Prepared By: SR.NO NAME OF STUDENT ENROLLMENT 1 Abhishek Lakhara
Writing Functions in Assembly
COMP2121: Microprocessors and Interfacing
Gursharan Singh Tatla INSTRUCTION SET OF 8085 Gursharan Singh Tatla Gursharan Singh Tatla
Unit 1 Instruction set M.Brindha AP/EIE
COMP2121: Microprocessors and Interfacing
Format of Assembly language
Overview of Architecture Assembly Programming Concepts
Gunjeet Kaur Dronacharya Group of institutions
Assembly Language Programming of 8085
Microprocessor T. Y. B. Sc..
Detailed Review of the 8085 Instruction Set.
3.Instruction Set of 8085 Consists of 74 operation codes, e.g. MOV
COMP2121: Microprocessors and Interfacing
Lecture Set 5 The 8051 Instruction Set.
Subroutines and the Stack
Microprocessor and Assembly Language
Chapter 4 Addressing modes
Machine control instruction
Writing Functions in Assembly
COMP3221: Microprocessors and Embedded Systems
Arithmetic and Logic Chapter 5
COMP2121: Microprocessors and Interfacing
COMP2121: Microprocessors and Interfacing
Introduction to Assembly Chapter 2
The CPU12 Microprocessor Core
Subroutines and the Stack
Chapter 8 Central Processing Unit
Microprocessors And Microcontrollers
Addressing Modes Register Direct, with 1 and 2 registers I/O Direct
COMP2121: Microprocessors and Interfacing
Tim Sumner, Imperial College, Rm: 1009, x47552
L13b – 32 bit multiply Department of Electrical and
Introduction to Assembly Chapter 2
Advanced Assembly Chapter 6
Arithmetic and Logic Chapter 5
Subroutines and the Stack
COMP3221: Microprocessors and Embedded Systems
CS501 Advanced Computer Architecture
COMP3221: Microprocessors and Embedded Systems
Computer Organization
Presentation transcript:

COMP3221: Microprocessors and Embedded Systems Lecture 9: Data Transfer Instructions http://www.cse.unsw.edu.au/~cs3221 Lecturer: Hui Wu Session 2, 2005 COMP3221: Microprocessors and Embedded Systems--Lecture 9

COMP3221: Microprocessors and Embedded Systems--Lecture 9 Overview Data transfer instructions in AVR Sample AVR assembly programs using data transfer instructions COMP3221: Microprocessors and Embedded Systems--Lecture 9

COMP3221: Microprocessors and Embedded Systems--Lecture 9 Motivations How to transfer data between two registers? How to transfer data between memory and a register? How to transfer a constant to a register? COMP3221: Microprocessors and Embedded Systems--Lecture 9

Selected Data Transfer Instructions mov, movw ldi, ld, ldd, lds st, sts lpm in, out Push, pop Refer to the main textbook and AVR Instruction Set for a complete list. COMP3221: Microprocessors and Embedded Systems--Lecture 9

COMP3221: Microprocessors and Embedded Systems--Lecture 9 Copy Register Syntax: mov Rd, Rr Operands: Rd, Rr {r0, r1, …, r31}               Operation: RdRr Flag affected: None Encoding: 0010 11rd dddd rrrr Words: 1 Cycles: 1 Example: mov r1, r0             ; Copy r0 to r1 COMP3221: Microprocessors and Embedded Systems--Lecture 9

COMP3221: Microprocessors and Embedded Systems--Lecture 9 Copy Register Pair Syntax: movw Rd+1:Rd, Rr+1:Rr Operands: d, r {0, 2, …, 28, 30}               Operation: Rd+1:RdRr+1:Rr Flag affected: None Encoding: 0000 0001 dddd rrrr Words: 1 Cycles: 1 Example: movw r21:r20, r1:r0             ; Copy r1:r0 to r21:r20 COMP3221: Microprocessors and Embedded Systems--Lecture 9

COMP3221: Microprocessors and Embedded Systems--Lecture 9 Load Immediate Syntax: ldi Rd, k Operands: Rd{r16, r17, …, r31} and 0 ≤ k  255               Operation: Rdk Flag affected: None Encoding: 1110 kkkk dddd kkkk Words: 1 Cycles: 1 Example: ldi r16, $42          ; Load $42 to r16 COMP3221: Microprocessors and Embedded Systems--Lecture 9

COMP3221: Microprocessors and Embedded Systems--Lecture 9 Load Indirect Syntax: ld Rd, v Operands: Rd{r0, r1, …, r31} and v{x, x+, -x, y, y+, -y, z, z+, -z} Operation: (i) Rd(v) if v {x, y, z} (ii) xx-1 and Rd(x) if v =-x yy-1 and Rd(y) if v =-y zz-1 and Rd(z) if v =-z (iii) Rd(x) and xx+1 if v =x+ Rd(y) and yy+1 if v =y+ Rd(z) and zz+1 if v =z+ Flag affected: None Encoding: Depends on v. Refer to AVR Instruction Set for details Words: 1 Cycles: 2 Comments: Post-inc and pre-dec are used to load contiguous data. COMP3221: Microprocessors and Embedded Systems--Lecture 9

Load Indirect (Cont.) Example : 4-byte integer addition .def loop_counter = r20 .equ loop_bound = 4 .dseg int1: .byte 4 ; Allocate 4 bytes to the first integer; int2: .byte 4 ; Allocate 4 byte to the second integer; int3: .byte 4 ; Allocate 4 byte to store the result .cseg ldi r26, low(int1) ; Load low byte of the address of the 1st int ldi r27, high(int1) ; Load high byte of the address of the 2nd int ldi r28, low(int2) ldi r29, high(int2) ldi r30, low(int3) ldi r31, high(int3) clr loop_counter ; loop_counter=0

COMP3221: Microprocessors and Embedded Systems--Lecture 9 Load Indirect (Cont.) Example: 4-byte integer addition. loop: ld r0, x+ ; Load the next byte of the 1st int ld r1, y+ ; Load the next byte of the 2nd int inc loop_counter cpi loop_counter, 1 ; Least significant byte? breq first_byte adc r1, r0 ; Add two bytes with carry jmp store first_byte: add r1, r0 ; Add two least significant bytes store: st z+, r1 ; Store the result cpi loop_counter, loop_bound ; End of loop? brlt loop ret COMP3221: Microprocessors and Embedded Systems--Lecture 9

Load Indirect with Displacement Syntax: ldd Rd, v Operands: Rd{r0, r1, …, r31} and v{y+q, z+q} Operation: Rd(v) Flag affected: None Encoding: Depends on v. Refer to AVR Instruction Set for details Words: 1 Cycles: 2 Example: clr r31                       ; Clear Z high byte ldi r30, $60               ; Set Z low byte to $60 ld r0, Z+                    ; Load r0 with data space loc. $60(Z post inc) ld r1, Z                      ; Load r1 with data space loc. $61 ldi r30, $63               ; Set Z low byte to $63 ld r2, Z                      ; Load r2 with data space loc. $63 ld r3, -Z                     ; Load r3 with data space loc. $62(Z pre dec) ldd r4, Z+2                ; Load r4 with data space loc. $64 Comments: ldd is used to load an element of a structure.

Store Indirect Syntax: st v, Rr Operands: Rr{r0, r1, …, r31} and v{x, x+, -x, y, y+, -y, z, z+, -z} Operation: (i) (v)Rr if v {x, y, z} (ii) xx-1 and (x)Rr if v =-x yy-1 and (y)Rr if v =-y zz-1 and (z)Rr if v =-z (iii) (x)Rr and xx+1 if v =x+ (y)Rr and yy+1 if v =y+ (z)Rr and zz+1 if v =z+ Flag affected: None Encoding: Depends on v. Refer to AVR Instruction Set for details Words: 1 Cycles: 2 Comments: Post-inc and pre-dec are used to store contiguous data.

Store Indirect with Displacement Syntax: std v, Rr Operands: Rd{r0, r1, …, r31} and v{y+q, z+q} Operation: (v)Rr Flag affected: None Encoding: Depends on v. Refer to AVR Instruction Set for details Words: 1 Cycles: 2 Example: clr        r29                ; Clear Y high byte ldi        r28, $60        ; Set Y low byte to $60 st         Y+, r0            ; Store r0 in data space loc. $60(Y post inc) st         Y, r1              ; Store r1 in data space loc. $61 ldi        r28, $63        ; Set Y low byte to $63 st         Y, r2              ; Store r2 in data space loc. $63 st         -Y, r3             ; Store r3 in data space loc. $62 (Y pre dec) std        Y+2, r4         ; Store r4 in data space loc. $64 Comments: std is used to store an element of a structure.

Load Program Memory Syntax: Operands: Operations: (i) LPM                       None, R0 implied               R0(Z) (ii) LPM Rd, Z               0 ≤ d ≤ 31                      Rd(Z) (iii) LPM Rd, Z+             0 ≤ d ≤ 31                      Rd(Z) Flag affected: None Encoding: (i) 1001 0101 1100 1000 (ii) 1001 000d dddd 0100 (iii) 1001 000d dddd 0101 Words: 1 Cycles: 3 Comments: Z contains the byte address while the flash memory uses word addressing. Therefore, the word address must be converted into byte address before having access to data on flash memory.

Load Program Memory (Cont.) Example ldi zh, high(Table_1<<1)             ; Initialize Z pointer ldi zl, low(Table_1<<1) lpm r16, z+                                 ; r16=0x76 lpm r17, z ; r17=0x58 ... Table_1: .dw 0x5876 … Comments: Table_1<<1 converts word address into byte address COMP3221: Microprocessors and Embedded Systems--Lecture 9

Load Program Memory (Cont.) Example ldi zh, high(Table_1<<1)             ; Initialize Z pointer ldi zl, low(Table_1<<1) lpm r16, z+                                 ; r16=0x76 lpm r17, z ; r17=0x58 ... Table_1: .dw 0x5876 … Comments: Table_1<<1 converts word address into byte address COMP3221: Microprocessors and Embedded Systems--Lecture 9

Load an I/O Location to Register Syntax: in Rd, A Operands: Rd{r0, r1, …, r31} and 0A63 Operation: RdI/O (A) Loads one byte from the location A in the I/O Space (Ports, Timers, Configuration registers etc.) into register Rd in the register file. Flag affected: None Encoding: 1011 0AAd dddd AAAA Words: 1 Cycles: 1 Example: in r25, $16            ; Read Port B cpi r25, 4              ; Compare read value to constant breq exit              ; Branch if r25=4 ... exit:   nop                        ; Branch destination (do nothing)

Store Register to an I/O Location Syntax: out A, Rr Operands: Rr{r0, r1, …, r31} and 0A63 Operation: I/O (A)Rr Store the byte in register Rr to the I/O location (register). Flag affected: None Encoding: 1011 1AAr rrrr AAAA Words: 1 Cycles: 1 Example: clr r16           ; Clear r16 ser r17           ; Set r17 to $ff out $18, r16     ; Write zeros to Port B nop               ; Wait (do nothing) out $18, r17       ; Write ones to Port B

Push Register on Stack Syntax: push Rr Operands: Rr{r0, r1, …, r31} Operation: (SP)  Rr SP  SP –1 Flag affected: None Encoding: 1001 001d dddd 1111 Words: 1 Cycles: 2 Example call routine           ; Call subroutine ... routine:   push r14   ; Save r14 on the stack push r13    ; Save r13 on the stack pop r13     ; Restore r13 pop r14     ; Restore r14 ret         ; Return from subroutine

Pop Register from Stack Syntax: pop Rr Operands: Rr{r0, r1, …, r31} Operation: Rr  (SP) SP  SP +1 Flag affected: None Encoding: 1000 000d dddd 1111 Words: 1 Cycles: 2 Example call routine           ; Call subroutine ... routine:   push r14   ; Save r14 on the stack push r13    ; Save r13 on the stack pop r13     ; Restore r13 pop r14     ; Restore r14 ret         ; Return from subroutine