Interconnection Network Design

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Presentation transcript:

Interconnection Network Design Adapted from UC, Berkeley Notes CS258 S99

Scalable, High Perf. Interconnection Network At Core of Parallel Computer Arch. Requirements and trade-offs at many levels Elegant mathematical structure Deep relationships to algorithm structure Managing many traffic flows Electrical / Optical link properties Little consensus interactions across levels Performance metrics? Cost metrics? Workload? => need holistic understanding 12/31/2018 CS258 S99

Requirements from Above Communication-to-computation ratio => bandwidth that must be sustained for given computational rate traffic localized or dispersed? bursty or uniform? Programming Model protocol granularity of transfer degree of overlap (slackness) => job of a parallel machine network is to transfer information from source node to dest. node in support of network transactions that realize the programming model 12/31/2018 CS258 S99

Goals latency as small as possible as many concurrent transfers as possible operation bandwidth data bandwidth cost as low as possible 12/31/2018 CS258 S99

Links and Channels Transmitter ...ABC123 => Receiver ...QR67 => transmitter converts stream of digital symbols into signal that is driven down the link receiver converts it back tran/rcv share physical protocol trans + link + rcv form Channel for digital info flow between switches link-level protocol segments stream of symbols into larger units: packets or messages (framing) node-level protocol embeds commands for dest communication assist within packet 12/31/2018 CS258 S99

Formalism network is a graph V = {switches and nodes} connected by communication channels C Í V ´ V Channel has width w and signaling rate f = 1/t channel bandwidth b = wf phit (physical unit) data transferred per cycle flit - basic unit of flow-control Number of input (output) channels is switch degree Sequence of switches and links followed by a message is a route Think streets and intersections 12/31/2018 CS258 S99

What characterizes a network? Topology (what) physical interconnection structure of the network graph direct: node connected to every switch indirect: nodes connected to specific subset of switches Routing Algorithm (which) restricts the set of paths that msgs may follow many algorithms with different properties gridlock avoidance? Switching Strategy (how) how data in a msg traverses a route circuit switching vs. packet switching Flow Control Mechanism (when) when a msg or portions of it traverse a route what happens when traffic is encountered? 12/31/2018 CS258 S99

Topological Properties Routing Distance - number of links on route Diameter - maximum routing distance between any two nodes in the network Average Distance – Sum of distances between nodes/number of nodes Degree of a Node – Number of links connected to a node => Cost high if degree is high A network is partitioned by a set of links if their removal disconnects the graph Fault-tolerance – Number of alternate paths between two nodes in a network 12/31/2018 CS258 S99

Typical Packet Format Two basic mechanisms for abstraction encapsulation fragmentation 12/31/2018 CS258 S99

Communication Perf: Latency Time(n)s-d = overhead + routing delay + channel occupancy + contention delay occupancy = (n + ne) / b Routing delay? Contention? 12/31/2018 CS258 S99

Review: Performance Metrics Sender Overhead Transmission time (size ÷ bandwidth) Sender (processor busy) Time of Flight Transmission time (size ÷ bandwidth) Receiver Overhead Receiver (processor busy) Transport Latency Easy to get these things confused! Colors should help Min (link BW, bisection BW) Assumes no congestion Receiver usually longer Better to send then receive Store Like send Read like Receive Total Latency Total Latency = Sender Overhead + Time of Flight + Message Size ÷ BW + Receiver Overhead Includes header/trailer in BW calculation? 12/31/2018 CS258 S99 CS258 S99

Store&Forward vs Cut-Through Routing h(n/b + D) vs n/b + h D what if message is fragmented? wormhole vs virtual cut-through 12/31/2018 CS258 S99

Store and Forward vs. Cut-Through Store-and-forward policy: each switch waits for the full packet to arrive in switch before sending to the next switch (good for WAN) Cut-through routing or worm hole routing: switch examines the header, decides where to send the message, and then starts forwarding it immediately In worm hole routing, when head of message is blocked, message stays strung out over the network, potentially blocking other messages (needs only buffer the piece of the packet that is sent between switches). CM-5 uses it, with each switch buffer being 4 bits per port. Cut through routing lets the tail continue when head is blocked, accordioning the whole message into a single switch. (Requires a buffer large enough to hold the largest packet). 12/31/2018 CS258 S99

Store and Forward vs. Cut-Through Advantage Latency reduces from function of: number of intermediate switches X by the size of the packet to time for 1st part of the packet to negotiate the switches + the packet size ÷ interconnect BW 12/31/2018 CS258 S99

Contention Two packets trying to use the same link at same time limited buffering drop? Most parallel mach. networks block in place link-level flow control tree saturation Closed system - offered load depends on delivered 12/31/2018 CS258 S99

Congestion Control Packet switched networks do not reserve bandwidth; this leads to contention (connection based limits input) Solution: prevent packets from entering until contention is reduced (e.g., freeway on-ramp metering lights) Options: Packet discarding: If packet arrives at switch and no room in buffer, packet is discarded (e.g., UDP) Flow control: between pairs of receivers and senders; use feedback to tell sender when allowed to send next packet Back-pressure: separate wires to tell to stop Window: give original sender right to send N packets before getting permission to send more; overlapslatency of interconnection with overhead to send & receive packet (e.g., TCP), adjustable window Choke packets: aka “rate-based”; Each packet received by busy switch in warning state sent back to the source via choke packet. Source reduces traffic to that destination by a fixed % (e.g., ATM) Mother’s day: “all circuits are busy” ATM packet: trying to avoid FDDI problem Hope that ATM used for local area packets Rate based for WAN Back pressure for LAN Telelecommunications is standards based: makes decision to ensure that no one has an advantage; all have a disadvantage Europe used 32 B and US 64B => 48B payload 12/31/2018 CS258 S99 CS258 S99

Protocols: HW/SW Interface Internetworking: allows computers on independent and incompatible networks to communicate reliably and efficiently; Enabling technologies: SW standards that allow reliable communications without reliable networks Hierarchy of SW layers, giving each layer responsibility for portion of overall communications task, called protocol families or protocol suites Transmission Control Protocol/Internet Protocol (TCP/IP) This protocol family is the basis of the Internet IP makes best effort to deliver; TCP guarantees delivery TCP/IP used even when communicating locally: NFS uses IP even though communicating across homogeneous LAN WS companies used TCP/IP even over LAN Because early Ethernet controllers were cheap, but not reliable 12/31/2018 CS258 S99 CS258 S99

TCP/IP packet Application sends message TCP breaks into 64KB segements, adds 20B header IP adds 20B header, sends to network If Ethernet, broken into 1500B packets with headers, trailers Header, trailers have length field, destination, window number, version, ... Ethernet IP Header TCP Header IP Data TCP data (≤ 64KB) 12/31/2018 CS258 S99

Bandwidth What affects local bandwidth? Aggregate bandwidth packet density b x n/(n + ne) routing delay b x n / (n + ne + wD) contention endpoints within the network Aggregate bandwidth bisection bandwidth sum of bandwidth of smallest set of links that partition the network total bandwidth of all the channels: Cb suppose N hosts issue packet every M cycles with ave dist each msg occupies h channels for l = n/w cycles each C/N channels available per node link utilization r = MC/Nhl < 1 12/31/2018 CS258 S99

Switches 12/31/2018 CS258 S99

Switch Components Output ports Input ports Crossbar Buffering transmitter (typically drives clock and data) Input ports synchronizer aligns data signal with local clock domain essentially FIFO buffer Crossbar connects each input to any output degree limited by area or pinout Buffering Control logic complexity depends on routing logic and scheduling algorithm determine output port for each incoming packet arbitrate among inputs directed at same output 12/31/2018 CS258 S99

Interconnection Topologies Class networks scaling with N Logical Properties: distance, degree Physcial properties length, width Fully connected network diameter = 1 degree = N cost? bus => O(N), but BW is O(1) - actually worse crossbar => O(N2) for BW O(N) VLSI technology determines switch degree 12/31/2018 CS258 S99

Summary Topology Degree Diameter Ave Dist Bisection D (D ave) @ P=1024 1D Array 2 N-1 N / 3 1 huge 1D Ring 2 N/2 N/4 2 2D Mesh 4 2 (N1/2 - 1) 2/3 N1/2 N1/2 63 (21) 2D Torus 4 N1/2 1/2 N1/2 2N1/2 32 (16) k-ary n-cube 2n nk/2 nk/4 nk/4 15 (7.5) @n=3 Hypercube n =log N n n/2 N/2 10 (5) 12/31/2018 CS258 S99