CC DEVELOPMENT PROGRESS and SCHEDULE PC3461M test card (Daughterboard for the development board) The manufactured boards are received. 8 boards in total. Initial test carried out - boards are in working order. Used for telegram and FAST data transmission tests. Initial test ok. Stress testing is carried out to verify the AC coupling circuitry. Initial test ok. (Testing to be completed first week of April) Available to detector developers. (Providing one channel clock/command) RTM prototype Schematic design and packaging finalised. The design is with the RAL for layout. - Expected to finish early May The production. - Expected June Testing – June-August

Firmware debug/development Joined to DESY-wide effort for DAMC2 FPGA development - for standardisation Initial development with DESY provided PCIe and IIbus blocks. CC specific blocks to be modified to use IIBus structure. - Expected to be finished late April Telegram transmit/receive  - Now partly developed by P Gessler's team Driver for the board being developed by DESY  - CC related modifications possible if needed xTCA in-crate testing DAMC2 board is in the crate. Powers up ok. Can be programmable. PCIe link works with a test firmware and driver. Current TR firmware from the SVN will be compiled and loaded to TR FPGA.  - There is a firmware with some functionality. – Late April DAMC2 firmware (generated by integrating the blocks) will be tested along with the driver. – Early May