Lecture 3 Review: Kirchoff’s Current Law Kirchoff’s Voltage Law

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Presentation transcript:

Lecture 3 Review: Kirchoff’s Current Law Kirchoff’s Voltage Law Ohm’s Law, Power, Power Conservation Kirchoff’s Current Law Kirchoff’s Voltage Law Related educational materials: Chapter 1.4

Review: Ohm’s Law Ohm’s Law Voltage-current characteristic of ideal resistor:

Review: Power Power: Power is positive if i, v agree with passive sign convention (power absorbed) Power is negative if i, v contrary to passive sign convention (power generated)

Review: Conservation of energy Power conservation: In an electrical circuit, the power generated is the same as the power absorbed. Power absorbed is positive and power generated is negative

Two new laws today: Kirchoff’s Current Law Kirchoff’s Voltage Law These will be defined in terms of nodes and loops

Basic Definition – Node A Node is a point of connection between two or more circuit elements Nodes can be “spread out” by perfect conductors

Basic Definition – Loop A Loop is any closed path through the circuit which encounters no node more than once

Kirchoff’s Current Law (KCL) The algebraic sum of all currents entering (or leaving) a node is zero Equivalently: The sum of the currents entering a node equals the sum of the currents leaving a node Mathematically: We can’t accumulate charge at a node

Kirchoff’s Current Law – continued When applying KCL, the current directions (entering or leaving a node) are based on the assumed directions of the currents Also need to decide whether currents entering the node are positive or negative; this dictates the sign of the currents leaving the node As long all assumptions are consistent, the final result will reflect the actual current directions in the circuit

KCL – Example 1 Write KCL at the node below:

KCL – Example 2 Use KCL to determine the current i

Kirchoff’s Voltage Law (KVL) The algebraic sum of all voltage differences around any closed loop is zero Equivalently: The sum of the voltage rises around a closed loop is equal to the sum of the voltage drops around the loop Mathematically: If we traverse a loop, we end up at the same voltage we started with

Kirchoff’s Voltage Law – continued Voltage polarities are based on assumed polarities If assumptions are consistent, the final results will reflect the actual polarities To ensure consistency, I recommend: Indicate assumed polarities on circuit diagram Indicate loop and direction we are traversing loop Follow the loop and sum the voltage differences: If encounter a “+” first, treat the difference as positive If encounter a “-” first, treat the difference as negative

KVL – Example Apply KVL to the three loops in the circuit below. Use the provided assumed voltage polarities

Circuit analysis – applying KVL and KCL In circuit analysis, we generally need to determine voltages and/or currents in one or more elements We can determine voltages, currents in all elements by: Writing a voltage-current relation for each element (Ohm’s law, for resistors) Applying KVL around all but one loop in the circuit Applying KCL at all but one node in the circuit

Circuit Analysis – Example 1 For the circuit below, determine the power absorbed by each resistor and the power generated by the source. Use conservation of energy to check your results.

Example 1 – continued

Circuit Analysis – Example 2 For the circuit below, write equations to determine the current through the 2 resistor

Example 2 – Alternate approach

Circuit Analysis The above circuit analysis approach (defining all “N” unknown circuit parameters and writing N equations in N unknowns) is called the exhaustive method We are often interested in some subset of the possible circuit parameters We can often write and solve fewer equations in order to determine the desired parameters

Circuit analysis – Example 3 For the circuit below, determine: (a) The current through the 2 resistor (b) The current through the 1 resistor (c) The power (absorbed or generated) by the source

Circuit Analysis Example 3 – continued