EMT 261 / 3 FUNDAMENTAL OF MICROELECTRONIC FABRICATIONI Design INTRODUCTION EMT 261 / 3 FUNDAMENTAL OF MICROELECTRONIC FABRICATIONI Design

Academic Staff Nurjuliana Juhari (nurjuliana@unimap.edu.my 04 979 8304 / 012 3099873) Norlida Abu Bakar (norlida@unimap.edu.my 04 985 5172) Bibi Nadia Taib (bibinadia@unimap.edu.my)

TEACHING & LEARNING MODE 14W LECTURES 7W LABORATORIES 5W TUTORIALS 2W TECHINCAL PAPER E-LEARNING

Teaching Plan StudyWeek Course Content Delivery Mode Level of Complexity Psbl. Asmt. 1 (3/Jan- 7/Jan/11) Lecture 01: Introduction to EMT261 / 3 Fundamental to Microelectronic Fabrication State and describe the history and evolution of integrated circuits Describe the overview of microelectronic fabrication (2 Hours) Lab 00 (a) Introduction to Micro Fabrication Cleanroom Lab 00 (b) Standard Operation Manual (SOP 1 - 10) Lecture E-Learning Lab (Introduction) Synthesis - 2 (10/Jan- 14/Jan/11) Lecture 02: Cleanroom Technology, Safety & Protocol Define cleanroom State classes of cleanroom State and explain sources of contamination Explain contamination control and the needs of cleanroom environment State the purpose of cleanroom protocol Apply gowning and degowning procedures Apply chemical handling and safety procedures (3 Hours) (SOP) a (Test) b

3 (17 Jan-21Jan 2011) Lecture 03: Basics of Semiconductor Define semiconductor State semiconductor materials and compounds Define and explain resistivity and band gap Describe crystal properties of semiconductor Define doping process and explain intrinsic and extrinsic semiconductors Explain relationships between dopant concentration and resistivity, conductivity. (2 Hours) Lab 01(a): Spin Speed and Photoresist Characterization Lab 01(b): Pattern Transfer Process Lab 02(a): Dry Oxidation (SiO2) Process Lab 02(b): Wet Oxidation (SiO2) Process Lecture E-Learning Lab Synthesis a (Test) b (Lab Report) 4 (24 Jan-28 Jan 2011) Lecture 04: Wafer Manufacturing State and explain advantages of silicon State and describe crystal defects Explain single-crystal silicon wafer manufacturing

5 (7 Feb – 11 Feb 2011) Lecture 05: Semiconductor Materials (2 Hours) Lab 01(a): Spin Speed and Photoresist Characterization Lab 01(b): Pattern Transfer Process Lab 02(a): Dry Oxidation (SiO2) Process Lab 02(b): Wet Oxidation (SiO2) Process Lecture E-Learning Lab Synthesis a (Test) b (Lab Report) 6 (14 Feb – 18 Feb 2011) Lecture 06: Wafer Cleaning State and explain the importance of wafer cleaning process Describe cleaning solutions and chemicals (3 Hours)

7 (21 Feb – 25 Feb 2011) Lecture 07: Thermal Processes I: Oxidation Define thermal processes and oxidation Describe the mechanisms of oxidation and oxidation process Explain two types of oxidation Determine and analyze important parameters of oxidation (2 Hours) Lab 03(a): Silicon Dioxide Wet Etching Process Lab 03(b): Metal (Al) Wet Etching Process Lab 03(c): Wet Cleaning Lab 04(a): Aluminum Deposition and Characterization Lab 04(b): Metal (Al) Wet Etching Process Lab 05(a): Spin On Dopant Process (n-type) Lab 05(b): Spin On Dopant Process (p-type) Mid Term Examination 1 (24/2/2011) Lecture E-Learning Lab Synthesis a (Test) Lab Report 8 (28 Feb – 4 Mac 2011) Lecture 08: Thermal Processes II: Diffusion Define diffusion Describe the diffusion process Determine and analyze important parameters of diffusion 9 (7 Mac – 11 Mac 2011) Lecture 09: Thermal Processes III: Annealing & Ion Implantation Define annealing and ion implantation Describe the annealing and ion implantation process Determine and analyze important parameters of annealing and ion implantation b (Lab Report)

10 (14 Mac – 18 Mac 2011) Lecture 10: Photolithography I (3 Hours) Define photolithography Describe the photolithography process Determine and analyze important parameters of photolithography Lecture E-Learning Synthesis a (Test) 11 (21 Mac – 25 Mac 2011) Lecture 11: Lithography Process II (continuation from Week 10) (3 Hours) 12 (28 Mac- 1Apr 2011) Lecture 12: Metallization I: CVD Define CVD Describe the CVD process Determine and analyze important parameters of CVD Group discussion 13 (4 Apr-8 Apr 2011) Lecture 13: Metallization II: PVD Define PVD Describe the PVD process Determine and analyze important parameters of PVD Mid Term Examination 1 (7/4/2011) 14 (11 Apr- 15 Apr 2011) Lecture 14 : Etching Define etching Describe the etching process Determine and analyze important parameters of etching a (test)

MODE OF ASSESSMENTS a) Coursework: 30 % Laboratory assessment: 20% Technical Paper and Presentation: 10% (b) Examination: 70% Final Exam: 50 % Mid Term Examination: 10% End Term Examination: 10%

COURSE OUTCOME CO1: Ability to explain and synthesis the essential aspects of the semiconductor fabrication technology which include materials, devices, processes, facilities and standard practises. CO2: Ability to explain, demonstrate and assess important parameters of wafer cleaning, etching and thermal processes. CO3: Ability to explain, demonstrate and select important parameters of photolithography process, chemical vapour deposition and physical vapour deposition

Where does the IC is used?

IC Anatomy ICs on PCB IC Package Inside IC IC Wafer

Transistor – a three terminal device Control electric current/voltage between two of the terminals by applying an electric current or voltage to the third terminal Applications: amplify electrical signals, like in radio electric switch, which can be controlled by another electrical switch. By cascading these switches, we can build up very complicated logic circuits.

Invention of the Transistor Vacuum tubes ruled in first half of 20th century. Large, expensive, power-hungry, unreliable 1947: first point contact transistor John Bardeen and Walter Brattain at Bell Labs Investigate the nature of electrons at the interface between a metal and a semiconductor First transistor (Courtesy of Texas Instrument)

Limits of Individual Transistors For many years, transistors were made as individual electronic components They were connected to other electronic components However, circuits based on individual transistors got problems: too large and too difficult to assemble. time delays for electric signals to propagate a long distance in these large circuits. To make the circuits even faster, one needed to pack the transistors closer and closer together.

Integrated Circuit In 1958 and 1959: the first integrated circuit was developed By Jack Kilby and Robert Noyce several transistors (<10) made at the same time, on the same piece of semiconductor. Since then, the number of transistors per unit area has increase dramatically.

First IC Device by Jack Kilby, Texas Instruments 1958 1st fabricated by Bell Labs in 1958. Jack Kilby demonstrated functional IC, fabricated on germanium strip consists of; one transistor one capacitor 3 resistors 17

First Silicon IC Chip by Robert Noyce, Fairchild Camera, 1961 Fairchild Semiconductor produced the 1st commercial ICs in 1961. This IC consists of only 4 transistors sold for USD 150 a piece. NASA was the main customer. In 1968, Robert Noyce cofounded Intel Corp. with Andrew Groove and Gordon Moore. 18

MOS Integrated Circuits 1970’s processes usually had only nMOS transistors Inexpensive, but consume power while idle 1980s-present: CMOS processes for low idle power Intel 4004 4-bit mProc

The integrated circuit from an Intel 8742, an 8-bit microcontroller that includes a CPU running at 12 MHz, 128 bytes of RAM, 2048 bytes of EPROM, and I/O in the same chip. Intel Duo Core processor, CPU speed max 3 GHz with almost 2 billion transistors

A Brief History Intel Pentium 4 mprocessor (55 million transistors) 2003 Intel Pentium 4 mprocessor (55 million transistors) 512 Mbit DRAM (> 0.5 billion transistors) 2006 Intel Duo Core microprocessor (151 million transistors) Driven by miniaturization of transistors Smaller is cheaper, faster, lower in power! Revolutionary effects on society

Annual Sales 1018 transistors manufactured in 2003 100 million for every human on the planet Size of worldwide semiconductor market

1965: Gordon Moore plotted transistor on each chip Moore’s Law 1965: Gordon Moore plotted transistor on each chip Transistor counts have doubled every 24 months As of 2006, chip areas range from a few square mm to around 350 mm2, with up to 1 million transistors per mm2.

Moore’s Law…(Cont)

Moore’s Law…(Cont) Many other factors grow exponentially Transistor becomes faster Consume less power Cheaper to manufacture

IC Integration Scale 26

Feature Size and Wafer Size 27

Road Map Semiconductor Industry 28

Limit of IC Size Is there a limit for the minimum feature size? 29

Limit of IC Device 30

IC Product Category 31

IC Design flow Market Idea System Design Architecture Definition Circuit Design Layout Design IC Fabrication & Testing Mass Production Market

OVERVIEW ON IC MANUFACTURING 33

IC Manufacturing A very complicated process, involves; Circuit design Manufacturing material Clean room technology, processing, equipment Wafer processing technology Die testing Chip packaging and final test 34

IC Manufacturing Processes 35

IC Manufacturing Processes 36

IC Design: Idea to Design Synthesis 37

IC Design: Architecture to Layout 38

EEPROM Design Layout Charge Pump 16K-bits Memory Cell Timer Architectural Design – Defines the application operating system and devices modules for system. SDA GND A2 A0 A1 SCL WP VCC Charge Pump 16K-bits Memory Cell Timer Control Logic (Master) EEPROM Design Layout E/W circuit Decoder Xe Decoder Xr Dec Y Data ctrl Address block Decoder px 39

Logic Design – Puts logic units such as adders, gates, inverters and registers into each module and run subroutines in each module . Circuit / Transistor Design – Individual transistors are laid out in each logic unit. Layout – To transfer from schematic to layout pMOS nMOS VDD VSS S D VIN VOUT 40

IC Design: Design Flow 41

Microelectronic Fabrication: From Design to Wafer 42

1st IC design by hand (Jack Kilby) Currently, hundreds of designers work on single product to design, validate and layouted will take several months to complete with the help of CAD tools. Main considerations; performance die size design time and cost testability 43

IC Design: State of The Art IC CMOS Inverter - basic building block of digital MOS design Layout Cross section 44

IC Design: Layout and Mask s of CMOS Inverter 45

Mask / Reticle After IC design is completed, generated layout image is printed on a piece of quartz glass coated with a layer of chromium. A laser beam projects the layout image onto the photoresist coated chrome glass surface. Photon change the chemistry of the exposed photoresist via a photo chemical reaction, and later dissolved in a base developer solution. A pattern etching removes the chromium at the exposed area. Therefore, it transfers the image of the IC layout to the quartz glass. This is done at mask shop 46

Typical Microelectronic Fabrication Process Flow Around 500 process steps to complete IC fabrication Involves 20 masking steps 47