Karnaugh Mapping Digital Electronics

Slides:



Advertisements
Similar presentations
EET 1131 Unit 5 Boolean Algebra and Reduction Techniques
Advertisements

BOOLEAN ALGEBRA. A Mathematical notation used to represent the function of the Digital circuit. A notation that allows variables & constants to have only.
Karnaugh Map Method.
Prof. Sin-Min Lee Department of Computer Science
Gate-Level Minimization
I NTRODUCTION TO THE K ARNAUGH M AP 1 Alan Clements.
Boolean Algebra and Combinational Logic
ECE 301 – Digital Electronics Karnaugh Maps (Lecture #7) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design,
CSE-221 Digital Logic Design (DLD)
EET 1131 Unit 5 Boolean Algebra and Reduction Techniques
Computer Engineering (Logic Circuits) (Karnaugh Map)
Digital Logic and Design Vishal Jethva Lecture No. 10 svbitec.wordpress.com.
Digital Logic Chapter 4 Presented by Prof Tim Johnson
1 Chapter 5 Karnaugh Maps Mei Yang ECG Logic Design 1.
Department of Computer Engineering
1 Digital Logic Design Week 5 Simplifying logic expressions.
Charles Kime & Thomas Kaminski © 2008 Pearson Education, Inc. Circuit Optimization Logic and Computer Design Fundamentals.
Digital Systems: Combinational Logic Circuits Wen-Hung Liao, Ph.D.
Computer Engineering (Logic Circuits) (Karnaugh Map)
Minimisation ENEL111. Minimisation Last Lecture  Sum of products  Boolean algebra This Lecture  Karnaugh maps  Some more examples of algebra and truth.
Karnaugh Mapping Digital Electronics. Karnaugh Mapping or K-Mapping This presentation will demonstrate how to Create and label two, three, & four variable.
1 Digital Logic Design Week 5&6 cont’d Revision for Quiz 2/Exam.
Karnaugh Maps (K maps). What are Karnaugh 1 maps?  Karnaugh maps provide an alternative way of simplifying logic circuits.  Instead of using Boolean.
BOOLEAN ALGEBRA AND LOGIC SIMPLIFICATION
THE K-MAP.
C.S.Choy39 TERMINOLOGY Minterm –product term containing all input variables of a function in either true or complementary form Maxterm – sum term containing.
1 Karnaugh Map Method Truth Table -TO- K-Map Y0101Y0101 Z1011Z1011 X0011X0011 minterm 0  minterm 1  minterm 2  minterm 3 
Digital Logic (Karnaugh Map). Karnaugh Maps Karnaugh maps (K-maps) are graphical representations of boolean functions. One map cell corresponds to a row.
School of Computer and Communication Engineering, UniMAP DKT 122/3 - DIGITAL SYSTEM I Chapter 4A:Boolean Algebra and Logic Simplification) Mohd ridzuan.
1 EENG 2710 Chapter 3 Simplification of Switching Functions.
EET 1131 Unit 5 Boolean Algebra and Reduction Techniques
CHAPTER 3 Simplification of Boolean Functions
Lecture 4 Nand, Nor Gates, CS147 Circuit Minimization and
DeMorgan’s Theorem DeMorgan’s 2nd Theorem
ECE 2110: Introduction to Digital Systems
ECE 3110: Introduction to Digital Systems
Dr. Clincy Professor of CS
Boolean Algebra and Combinational Logic
Karnaugh Map Method.
Lecture 3 Gunjeet Kaur Dronacharya Group of Institutions
Karnaugh Maps.
Digital Logic and Design
Karnaugh Maps (K-Maps)
Instructor: Alexander Stoytchev
BASIC & COMBINATIONAL LOGIC CIRCUIT
Combinational Logic Design Process
Digital Logic & Design Dr. Waseem Ikram Lecture 13.
Karnaugh Mapping Karnaugh Mapping Digital Electronics
SYEN 3330 Digital Systems Chapter 2 – Part 4 SYEN 3330 Digital Systems.
Karnaugh Mapping Digital Electronics
ECE 331 – Digital System Design
ECE 331 – Digital System Design
Karnaugh Mapping Karnaugh Mapping Digital Electronics
ECE 331 – Digital System Design
SYEN 3330 Digital Systems Chapter 2 – Part 5 SYEN 3330 Digital Systems.
ECB2212-Digital Electronics K-Map
Instructor: Alexander Stoytchev
Chapter 10.3 and 10.4: Combinatorial Circuits
CS Chapter 3 (3A and ) – Part 3 of 5
Dr. Clincy Professor of CS
Instructor: Alexander Stoytchev
Overview Part 2 – Circuit Optimization
3-Variable K-map AB/C AB/C A’B’ A’B AB AB’
Circuit to Truth Table to Logic Expression
Karnaugh Maps (K maps).
Analysis of Logic Circuits Example 1
Laws & Rules of Boolean Algebra
Karnaugh Map Method By: Asst Lec. Besma Nazar Nadhem
Circuit Simplification and
Computer Architecture
Presentation transcript:

Karnaugh Mapping Digital Electronics 2.2 Intro to NAND & NOR Logic Karnaugh Mapping Digital Electronics Project Lead The Way, Inc. Copyright 2009

Karnaugh Mapping or K-Mapping Digital Electronics 2.2 Intro to NAND & NOR Logic Karnaugh Mapping or K-Mapping This presentation will demonstrate how to Create and label two, three, & four variable K-Maps. Use the K-Mapping technique to simplify logic designs with two, three, and four variables. Use the K-Mapping technique to simplify logic design containing don’t care conditions. Boolean Algebra Simplification K-Mapping Simplification ≡ Project Lead The Way, Inc. Copyright 2009

Karnaugh Map Technique Karnaugh Mapping Digital Electronics 2.2 Intro to NAND & NOR Logic Karnaugh Map Technique K-Maps are a graphical technique used to simplify a logic equation. K-Maps are procedural and much cleaner than Boolean simplification. K-Maps can be used for any number of input variables, BUT are only practical for two, three, and four variables. Project Lead The Way, Inc. Copyright 2009

Karnaugh Mapping Digital Electronics 2.2 Intro to NAND & NOR Logic K-Map Format Each minterm in a truth table corresponds to a cell in the K-Map. K-Map cells are labeled such that both horizontal and vertical movement differ only by one variable. Since the adjacent cells differ by only one variable, they can be grouped to create simpler terms in the sum-of- products expression. The sum-of-products expression for the logic function can be obtained by OR-ing together the cells or group of cells that contain 1s. Project Lead The Way, Inc. Copyright 2009

Adjacent Cells = Simplification Karnaugh Mapping Digital Electronics 2.2 Intro to NAND & NOR Logic Adjacent Cells = Simplification V 1 V V 1 Project Lead The Way, Inc. Copyright 2009

Truth Table to K-Map Mapping Karnaugh Mapping Digital Electronics 2.2 Intro to NAND & NOR Logic Truth Table to K-Map Mapping Two Variable K-Map V 1 2 3 V W X FWX Minterm – 0 1 Minterm – 1 Minterm – 2 Minterm – 3 1 1 Project Lead The Way, Inc. Copyright 2009

Two Variable K-Map Groupings Karnaugh Mapping Digital Electronics 2.2 Intro to NAND & NOR Logic Two Variable K-Map Groupings Groups of One – 4 V 1 1 1 1 Project Lead The Way, Inc. Copyright 2009

Two Variable K-Map Groupings Karnaugh Mapping Digital Electronics 2.2 Intro to NAND & NOR Logic Two Variable K-Map Groupings Groups of Two – 4 V 1 1 1 1 Project Lead The Way, Inc. Copyright 2009

Two Variable K-Map Groupings Karnaugh Mapping Digital Electronics 2.2 Intro to NAND & NOR Logic Two Variable K-Map Groupings Group of Four – 1 V 1 Project Lead The Way, Inc. Copyright 2009

K-Map Simplification Process Karnaugh Mapping Digital Electronics 2.2 Intro to NAND & NOR Logic K-Map Simplification Process Construct a label for the K-Map. Place 1s in cells corresponding to the 1s in the truth table. Place 0s in the other cells. Identify and group all isolated 1’s. Isolated 1’s are ones that cannot be grouped with any other one, or can only be grouped with one other adjacent one. Group any hex. Group any octet, even if it contains some 1s already grouped but not enclosed in a hex. Group any quad, even if it contains some 1s already grouped but not enclosed in a hex or octet. Group any pair, even if it contains some 1s already grouped but not enclosed in a hex, octet, or quad. OR together all terms to generate the SOP equation. Project Lead The Way, Inc. Copyright 2009

Example #1: 2 Variable K-Map Karnaugh Mapping Digital Electronics 2.2 Intro to NAND & NOR Logic Example #1: 2 Variable K-Map Example: After labeling and transferring the truth table data into the K-Map, write the simplified sum-of-products (SOP) logic expression for the logic function F1. V J K F1 1 Project Lead The Way, Inc. Copyright 2009

Example #1: 2 Variable K-Map Karnaugh Mapping Digital Electronics 2.2 Intro to NAND & NOR Logic Example #1: 2 Variable K-Map Example: After labeling and transferring the truth table data into the K-Map, write the simplified sum-of-products (SOP) logic expression for the logic function F1. Solution: V 1 J K F1 1 Project Lead The Way, Inc. Copyright 2009

Truth Table to K-Map Mapping Karnaugh Mapping Digital Electronics 2.2 Intro to NAND & NOR Logic Truth Table to K-Map Mapping Three Variable K-Map W X Y FWXY Minterm – 0 1 Minterm – 1 Minterm – 2 Minterm – 3 Minterm – 4 Minterm – 5 Minterm – 6 Minterm – 7 V 1 2 3 6 7 4 5 1 Only one variable changes for every row change 1 1 Project Lead The Way, Inc. Copyright 2009

Three Variable K-Map Groupings Karnaugh Mapping Digital Electronics 2.2 Intro to NAND & NOR Logic Three Variable K-Map Groupings Groups of One – 8 (not shown) Groups of Two – 12 1 1 V 1 1 1 1 1 1 1 1 1 1 Project Lead The Way, Inc. Copyright 2009

Three Variable K-Map Groupings Karnaugh Mapping Digital Electronics 2.2 Intro to NAND & NOR Logic Three Variable K-Map Groupings Groups of Four – 6 1 V 1 1 1 1 1 Project Lead The Way, Inc. Copyright 2009

Three Variable K-Map Groupings Karnaugh Mapping Digital Electronics 2.2 Intro to NAND & NOR Logic Three Variable K-Map Groupings Group of Eight - 1 V 1 Project Lead The Way, Inc. Copyright 2009

Example #2: 3 Variable K-Map Karnaugh Mapping Digital Electronics 2.2 Intro to NAND & NOR Logic Example #2: 3 Variable K-Map Example: After labeling and transferring the truth table data into the K-Map, write the simplified sum-of-products (SOP) logic expression for the logic function F2. E F G F2 1 Project Lead The Way, Inc. Copyright 2009

Example #2: 3 Variable K-Map Karnaugh Mapping Digital Electronics 2.2 Intro to NAND & NOR Logic Example #2: 3 Variable K-Map Example: After labeling and transferring the truth table data into the K-Map, write the simplified sum-of-products (SOP) logic expression for the logic function F2. Solution: V 1 E F G F2 1 Project Lead The Way, Inc. Copyright 2009

Four Variable K-Map Groupings Karnaugh Mapping Digital Electronics 2.2 Intro to NAND & NOR Logic Four Variable K-Map Groupings Groups of One – 16 (not shown) Groups of Two – 32 (not shown) Groups of Four – 24 (seven shown) 1 1 1 V 1 1 1 1 Project Lead The Way, Inc. Copyright 2009

Four Variable K-Map Groupings Karnaugh Mapping Digital Electronics 2.2 Intro to NAND & NOR Logic Four Variable K-Map Groupings Groups of Eight – 8 (two shown) 1 V 1 Project Lead The Way, Inc. Copyright 2009

Four Variable K-Map Groupings Karnaugh Mapping Digital Electronics 2.2 Intro to NAND & NOR Logic Four Variable K-Map Groupings Group of Sixteen – 1 V 1 Project Lead The Way, Inc. Copyright 2009

Example #3: 4 Variable K-Map Karnaugh Mapping Digital Electronics 2.2 Intro to NAND & NOR Logic Example #3: 4 Variable K-Map Example: After labeling and transferring the truth table data into the K-Map, write the simplified sum-of-products (SOP) logic expression for the logic function F3. V R S T U F3 1 Project Lead The Way, Inc. Copyright 2009

Karnaugh Mapping Digital Electronics 2.2 Intro to NAND & NOR Logic Don’t Care Conditions A don’t care condition, marked by (X) in the truth table, indicates a condition where the design doesn’t care if the output is a (0) or a (1). A don’t care condition can be treated as a (0) or a (1) in a K-Map. Treating a don’t care as a (0) means that you do not need to group it. Treating a don’t care as a (1) allows you to make a grouping larger, resulting in a simpler term in the SOP equation. Project Lead The Way, Inc. Copyright 2009

Some You Group, Some You Don’t Karnaugh Mapping Digital Electronics 2.2 Intro to NAND & NOR Logic Some You Group, Some You Don’t This don’t care condition was treated as a (1). This allowed the grouping of a single one to become a grouping of two, resulting in a simpler term. V X 1 There was no advantage in treating this don’t care condition as a (1), thus it was treated as a (0) and not grouped. Project Lead The Way, Inc. Copyright 2009

Example #4: Don’t Care Conditions Karnaugh Mapping Digital Electronics 2.2 Intro to NAND & NOR Logic Example #4: Don’t Care Conditions Example: After labeling and transferring the truth table data into the K-Map, write the simplified sum-of-products (SOP) logic expression for the logic function F4. Be sure to take advantage of the don’t care conditions. V R S T U F4 X 1 Project Lead The Way, Inc. Copyright 2009