The Nostalgic 4 ECE 477 Group 5 Peter Salama John Mastarone Jorge Marcet Zhixiang Zhang

Component Justification Scope The Nostalgic 4 Project Overview Functionality Block Diagram Packaging Design Component Justification Schematic Conclusion Project Overview Block Diagram Packaging Design Component Justification Schematic Conclusion

Component Justification Project Overview Purpose: To design and build a simple video game console. Functionality: NTSC-TV Output 2 Nintendo Controllers USB Memory-stick for Game Storage 2 Trial Games: Pong Cannons Project Overview Block Diagram Packaging Design Component Justification Schematic Conclusion

Component Justification Project Overview Pong Cannons Project Overview Block Diagram Packaging Design Component Justification Schematic Conclusion

Component Justification Project Overview Project Success Criteria: Ability to generate NTSC video output signal Ability to create and run games Ability to control game functions via two (Nintendo) game controllers Ability to generate sound Ability to load game code from a USB memory-stick Project Overview Block Diagram Packaging Design Component Justification Schematic Conclusion

Component Justification Block Diagram Video RAM NTSC Interface TV Set System RAM 27 15 5 USB Plug’n’Play Interface Memory Stick Microprocessor 16 USB Interface Video Display Circuit Sound Circuit 21 5/3.3V Power Supply Power or Reset Game Controller 7 7 Power Supply User Interface Project Overview Block Diagram Packaging Design Component Justification Schematic Conclusion

Component Justification Packaging Design References: www.us.playstation.com www.nintendo.com www.microsoft.com Project Overview Block Diagram Packaging Design Component Justification Schematic Conclusion

Component Justification Comparing Consoles PS2 XBOX GameCube Power Consumption (W) 79 100 Dimensions (mm w/h/d) 301 x 78 x 182 300 x 180 x 80 148 x 108 x 158 Mass (Kg) 2.2 4 2 Console Physical Characteristics References: www.us.playstation.com www.nintendo.com www.microsoft.com Project Overview Block Diagram Packaging Design Component Justification Schematic Conclusion

Component Justification Comparing Consoles PS2 XBOX GameCube CPU 128-Bit @ 300 MHz Intel Pentium III 733 MHz 32-bit Address, 64-bit Data bus @ 485 MHz Graphics 150 MHz 4 MB VRAM 75 Mil Polygons Nvidia, 250 MHz 125 Mil Polygons 162 MHz 4 MB total VRAM 12 Mil Polygons Game Storage DVD ROM Mini-CD Other Console Characteristics References: www.howstuffworks.com Project Overview Block Diagram Packaging Design Component Justification Schematic Conclusion

Component Justification Analysis Their CPUs too powerful for The Nostalgic 4 Graphical interface of classic games are generally simple Generally too bulky to move around Controllers too big to comfortably hold Project Overview Block Diagram Packaging Design Component Justification Schematic Conclusion

Component Justification Aims Novelty Simplicity Compact References: www.howstuffworks.com Project Overview Block Diagram Packaging Design Component Justification Schematic Conclusion

Component Justification External Parts References: www.nintendo.com www.google.com Project Overview Block Diagram Packaging Design Component Justification Schematic Conclusion

Component Justification Proposed Design References: Group 5, Homework 5 Project Overview Block Diagram Packaging Design Component Justification Schematic Conclusion

Component Justification Main Components: Part Manufacturer Function MC9S12A256 Motorola Microprocessor XC95108 Xilinx Video Display AD724 Analog Devices RGB to NTSC Converter SL811HS Cypress USB Host Controller CY7C109 SRAM/Video RAM 74VHC573 Fairfield High-Speed Latches Project Overview Block Diagram Packaging Design Component Justification Schematic Conclusion

Microcontroller Comparisons Component Justification MC9S12A256 Motorola Product Memory Operating Frequency Packaging ATmega64 64K Flash 2K bytes EEPROM 4K bytes SRAM 8/16 MHz 64-pin RCM3000 512K Flash 512K bytes EEPROM 28.4 MHz 52-pin MC9S12A256 256K Flash 4K bytes EEPROM 12K bytes SRAM 25 MHz 112-pin Microcontroller Comparisons References: www.atmel.com www.rabbitsemiconductor.com www.freescale.com Project Overview Block Diagram Packaging Design Component Justification Schematic Conclusion

Component Justification MC9S12A256 Motorola Fast I/O pins Large number of potential I/O pins: 112 pins Multiplexed data/address bus Maximum bus speed: 25 MHz Easy access to development interface CodeWarrior Via BDM header and RS-232 protocol Many modes of operation Used in reference design References: MC9S12A256 datasheet www.freescale.com Project Overview Block Diagram Packaging Design Component Justification Schematic Conclusion

Component Justification XC95108 Xilinx In-circuit programmable Fast pin-to-pin logic: 7.5 ns 5.0 V or 3.3 V I/O capability Development board is available ECE 477 Lab owns one Code already compiled Preferred part in video display reference design: Elm-Chan References: XC95108 datasheet www.xilinx.com Elm-chan webpage Project Overview Block Diagram Packaging Design Component Justification Schematic Conclusion

Component Justification AD724 Analog Devices 5.0 V operation Minimal external components Saves PCB layout space Compact 16-pin design Used in reference design References: XC95108 datasheet www.xilinx.com Elm-chan webpage Project Overview Block Diagram Packaging Design Component Justification Schematic Conclusion

Component Justification SL811HS Cypress Supports dual-speed USB transfer: Full-speed (12 Mbps) @ 48 MHz Low-speed (1.5 Mbps) Does not require DMA Controller Requires no glue-logic to sync with microprocessor Available reference design References: SL811HS datasheet www.cypress.com Project Overview Block Diagram Packaging Design Component Justification Schematic Conclusion

Component Justification SL811HS Cypress References: www.cypress.com Project Overview Block Diagram Packaging Design Component Justification Schematic Conclusion

Component Justification CY7C109 Cypress High speed: tAA = 12 ns TTL compatible I/O Low active power (at 12 ns): 495 mW Used in reference design References: CY7C109 datasheet www.cypress.com Project Overview Block Diagram Packaging Design Component Justification Schematic Conclusion

Component Justification 74VHC573 Fairfield High speed: tPD = 5.0 ns (typ) @ 5.0 V High noise immunity: VNIH = VNIL = 28% VCC (min) Low noise: VOLP = 0.6 V (typ) 8-bit address latch required for design Reference design uses variant: 74VHC373 Same function Different pin-outs References: 74VHC573 datasheet www.fairfield.com Project Overview Block Diagram Packaging Design Component Justification Schematic Conclusion

Component Justification Current Regulation Part Qty Max Required Current per Chip (mA) Max Required Current (mA) MC9S12A256 1 65 XC95108 200 AD724 42 SL811HS 25 CY7C109 3 90 270 74VHC573 2 75 150 752 Max Required Current = 752 mA Power Supply = 12 V DC @1500 mA References: Datasheets of respective parts Project Overview Block Diagram Packaging Design Component Justification Schematic Conclusion

Component Justification Schematic Power Supply Microprocessor Video Display USB Interface Miscellaneous Project Overview Block Diagram Packaging Design Component Justification Schematic Conclusion

Schematic: Power Supply Supplies 2 voltages to power circuit board: 3.3 V for USB Memory-stick 5.0 V for rest of board Wide DC input range Temperature constraints compatibility Project Overview Block Diagram Packaging Design Component Justification Schematic Conclusion

Schematic: Microprocessor Brief Overview “Brain” of the video console Interfaces to the various functional blocks USB Interface Video Circuit Game Controllers Project Overview Block Diagram Packaging Design Component Justification Schematic Conclusion

Schematic: Video Display Sample PCB Layout References: XC95108 datasheet www.xilinx.com Elm-chan webpage Project Overview Block Diagram Packaging Design Component Justification Schematic Conclusion

Schematic: Video Display References: XC95108 datasheet www.xilinx.com Elm-chan webpage Project Overview Block Diagram Packaging Design Component Justification Schematic Conclusion

Schematic: USB Interface Availability of reference documents Easy operability Built in RAM buffer 48 MHz clock capability Project Overview Block Diagram Packaging Design Component Justification Schematic Conclusion

Schematic: Miscellaneous NES Controller Timing Sheet Project Overview Block Diagram Packaging Design Component Justification Schematic Conclusion

Component Justification Conclusion Project Overview Block Diagram Packaging Design Component Justification Schematic Conclusion