EE4OI4 Engineering Design Sequential Design and Hierarchy

Design problem UP3: Design considered here is an 8-bit counter, with outputs displayed on LCD panel. This is a sequential circuit since the value of output depends on the input and past behavior (state) both UPcore functions are used for the design UPcore functions are special hardware blocks designed to support the use of I/O features on the UP board (push buttons, seven segments, keyboard, mouse and video output).

Design problem The counter should count up when one of the pushbuttons is pressed The other pushbutton resets the counter We use the function lpm_counter0 available in the Mega-functions library

Hierarchy Complex designs are typically broken into smaller design units, which are easier to understand and implement Smaller designs are interconnected to form the complex system The overall design is a hierarchy of interconnected smaller design units.

Debouncing A push button contains a metal spring and it makes several contacts before stability v t Many of these pulses have enough amplitude to generate a clock pulse for the counter counter clk

Debouncing For single-pole single-throw (SPST) push button: a time averaging filter Time averaging filter v t 11110101010000

Debouncing UPcore has a debouncing module It uses a 4 bit shift register, clocked at 100Hz to do the filtering If all four bits in the register are high (low) the output will be high (low) A clock division module is used to reduce the 48 MHz UP3 system clock to 100 Hz.