SYEN 3330 Digital Systems Chapter 7 – Part 1 SYEN 3330 Digital Systems

Registers SYEN 3330 Digital Systems

Example: 2-bit Register SYEN 3330 Digital Systems

Registers: Storage Model SYEN 3330 Digital Systems

Registers with Clock Gating Load signal is used to enable the clock signal to pass through if 1 and prevent the clock signal from passing through if 0. Example: For Positive Edge Triggering or Neg. Pulse MS What logic is needed for gating? What is the problem? Master Clock Load Gated Clock to FF Clock Skew of GC SYEN 3330 Digital Systems

Registers with Load Control SYEN 3330 Digital Systems

Registers with Load Control SYEN 3330 Digital Systems

Shift Registers SYEN 3330 Digital Systems

Shift Registers (Continued) SYEN 3330 Digital Systems

Parallel Load Shift Registers SYEN 3330 Digital Systems

Shift Registers with More Functions SYEN 3330 Digital Systems

Serial Data Operations SYEN 3330 Digital Systems

Serial Adder SYEN 3330 Digital Systems