Dave Hurlburt dah@cadence.com March 27, 2018 Design True DFx Dave Hurlburt dah@cadence.com March 27, 2018.

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Presentation transcript:

Dave Hurlburt dah@cadence.com March 27, 2018 Design True DFx Dave Hurlburt dah@cadence.com March 27, 2018

Agenda In-Design DFx, what is it? Traditional manufacturing sign-off flow In-Design DFx capabilities Demo Summary

In-Design DFx, what is it?

Allegro/OrCAD In-Design DFx On-line Manufacturing Checks Not an external tool as is the prevalent industry standard of batch-mode Consistent with Allegro Constraint Driven on-line checking solution Real-time violation detection Benefits Shortens the PCB design release process Eliminates unnecessary iterations with a sign-off user Predictable design process Addresses critical DFF checks ~200+ basic checks in Allegro PCB Designer* ~1500+ advanced checks in Allegro Venture PCB Designer* Integrated in Allegro Canvas Significantly reduce dependence on Valor, enabling displacements Integrated DRC description with graphics * Based on a typical rules configuration

Traditional Manufacturing Sign-off Flow

Traditional Sign-off Flow Step 1 : Edit design - Electrical constraints build design intent Logic Schematics Placement Routing Mfg Prep Step 2 : Prepare design for sign-off - Generate output files - Gerber, NC drill, IPC-356…. - Create file package - Send to validation tool 4 to 48 hours Manufacturing Sign-off Step 3 : Run validation tools - Verify all data present - Errors found return to Step 1 Step 4 : Send to manufacturing CM / EMS

Most Common Issues found at sign-off Copper to board edge spacing Acid traps Copper slivers Annular ring

What’s wrong with this process? Most common issues are found late in the process Communication delays for issue notification Once corrected, verified again Causes delays in release to manufacturing Interruption of work in progress

In-Design DFx Capabilities

Design For Fabrication Checks Data Physical fabrication based checks only Bare board type checks. No net checks No constraint region checks Rigid-Flex zone aware Defined in Constraint Manager Import/export only manufacturing rules capability DRC Modes Analysis Online, batch, off Additional group of constraint set checks Only targeted at fabrication and assembly Independent of all other constraint driven rules Leverages multi-threading technology to enhance performance

In-Design DFx Finds Common Issues Copper to board edge spacing Acid traps Copper slivers Annular ring

In-Design DFx in the PCB Editor 17.2 Currently available in 17.2 QIR4 update Released August 2017

In-Design DFx Basic In-Design checking Five (5) major DFF categories On-line checking when using interactive commands Five (5) major DFF categories Outline Mask Annular Ring Copper Spacing Silkscreen DFF rule management Import/Export support Multiple configurations Supports technology file rule locking

New In-Design DFx Advanced Expanded Checks More object types Analytics (ex. hole aspect ratio) Rigid/flex features (ex. arc corner) Seven (7) major DFF categories Outline Mask Annular Ring Holes Copper Features Copper Spacing Silkscreen

Typical DFF Rule Configuration Examples Product DFF Rule Classes Root Rules Rigid or Flex Configuration Rigid/Flex Configuration In-Design DFF Basic 5 80 210 checks ~350 checks In-Design DFF Advanced 7 645 1742 checks ~2535 checks

List of every rule that DFF checks

Outline and Cutout checks

Annular Ring Checks

Hole and Silkscreen

Copper Features

Copper Spacing

Copper Spacing continued

Copper Spacing continued Pictures?

Copper Spacing continued These categories all expand to the same level of granularity as the trace/pin examples in the previous slides

Summary

Summary Real-time, integrated DFM solution Differentiated solution, not batch oriented Consistent with Allegro Constraint Driven design flow Addresses critical DFF needs Fewer Iterations between Design and Sign- off Reduction in release to manufacturing time Allegro with in-design DFx MO CM / EMS

What’s Next for In-Design DFx DFF rule enhancements Continue to add more rule sets Additional DFx Domains Design for Assembly Design for Test