Virtual Platforms Driving Software Quality in Pre-Silicon SOFTWARE QUALITY CONFERENCE PACIFIC NW Virtual Platforms Driving Software Quality in Pre-Silicon AMITH PULLA 10/09/2018 PNSQC 2018 PNSQC ™
Introduction Technical Program Manager at Intel SOFTWARE QUALITY CONFERENCE Introduction PACIFIC NW Technical Program Manager at Intel Involved in software development, testing strategies and processes Works on virtual platform development and software validation Worked with Agile development methodology (Scrum and Scaled Agile Framework) PMP, CSTE in 2006 and CSM in 2012 PNSQC ™
Virtual Prototyping Software-based engineering discipline SOFTWARE QUALITY CONFERENCE PACIFIC NW Software-based engineering discipline Modelling a system using software tools Models used for Simulation Visualizing its behavior under real-world operating conditions Refining its design through an iterative process Applications: Mobile software development and validation Semiconductor Industry (Hardware platform development) Automotive industry Mechanical Engineering PNSQC ™
Hardware Development Lifecycle SOFTWARE QUALITY CONFERENCE PACIFIC NW Spec Freeze Tape Out Silicon Power On Launch Pre-Silicon (Simulation) Post-Silicon (Actual Hardware) Architecture and Design Hardware Development Manufacture Software Development, Integration and Validation PNSQC ™
System Hardware
Key Capabilities of Virtual Platforms Flexible and configurable, no restrictions of physical hardware for developers/architects Non-intrusively debug and inspect complex systems, can execute a system in forward and reverse direction for easy debugging Provides an abstract, executable representation of the hardware to SW/FW developers Runs unmodified target software from the physical target system (BIOS, FW, OS, BSP, middleware, applications)
Key Advantages of Virtual Platforms for Software Early software development on pre-RTL models, before silicon, RTL simulation, FPGA prototype is available Enables SW testing, debugging, find and fix SW/FW bugs in Pre-Silicon Improves collaboration between hardware and software design teams Platform SW/FW Completeness and Validation before PO (Power On) Path Clearing for SLE (System Level Emulation) Models Enables external hardware OEMs and ODMs to start SW/FW development early Replicable on compute platforms and shared across distributed teams Applications and Workloads qualification in pre-silicon
HW Development Shift-Left
Software Stack Example Applications/Workloads Application Framework Libraries, Complier and Runtime OS Kernel (display, audio, wifi, camera etc.) Source: https://software.intel.com/en-us/node/713791
Enabling SW Stack in Pre-Silicon BIOS/UEFI Development SW and FW Stack Development Driver Development OS Enabling (Windows, Linux, ESXi) Workloads Optimization Workload Characterization
Thank You! Amith David Pulla Twitter @pamith SOFTWARE QUALITY CONFERENCE PACIFIC NW Amith David Pulla Twitter @pamith LinkedIn: https://www.linkedin.com/in/amith-david-pulla-4a21224/ PNSQC ™