Programmable Interval timer 8253 / 8254

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Presentation transcript:

Programmable Interval timer 8253 / 8254 senthil/ECE/CCET

WHY 8253??? NOT POSSIBLE TO GENERATE ACCURATE TIME DELAYS USING DELAY ROUTINES IN 8085 INTEL’S PROGRAMMABLE COUNTER/ TIMER DEVICE ( 8253) FACILITATES ACCURATE TIME DELAYS MINIMIZES LOAD ON MP REAL TIME CLOCK EVENT COUNTER DIGITAL ONE SHOT SQUARE WAVE GENERATOR COMPLEX WAVEFORM GENERATOR senthil/ECE/CCET

8253 VS 8254 8253 8254-ADVANCED VERSION OF 8253 8253 CAN OPERATE AT FREQUENCY FROM DC to 2MHz 8254-ADVANCED VERSION OF 8253 8254 CAN OPERATE WITH HIGHER CLOCK FREQUENCY RANGE ( DC to 8 MHz AND 10 MHz FOR 8254-2) INCLUDES STATUS READ BACK COMMAND THAT LATCHES THE COUNT AND STATUS OF COUNTERS senthil/ECE/CCET

8254 BLOCK THREE INDEPENDENT 16-BIT COUNTERS 8-BIT BIDIRECTIONAL DATA BUFFER READ/WRITE LOGIC CONTROL WORD REGISTER 8254 BLOCK senthil/ECE/CCET

BLOCK DIAGRAM OF 8254 senthil/ECE/CCET

BLOCK OF 8254 COUNTERS CONTROL LOGIC DATA BUFFERS THREE COUNTERS – C1,C2 & C3 EACH 16 BIT IDENTICAL PRESETTABLE DOWN COUNTER OPERATES IN BCD /HEX CONTROLLED BY LOADING COUNT TO COMMAND WORD REGISTER “ON THE FLY” READING CONTROL LOGIC CS’ – LOGIC 0 – ENABLES 8254 RD’ – LOGIC 0 – TELLS MP READS COUNT FROM 8254 WR’ – LOGIC 0 – TELLS MP WRITES COUNT/ COMMAND INTO 8254 A1,A0 – ADDRESS INPUT PINS TO SELECT MODES AND COUNTERS DATA BUFFERS 8 BIT BIDIRECTIONAL D0-D7 CONNECTED TO DATA BUS OF MP IN  READS DATA FROM PERIPHERAL OUT  WRITES DATA TO PERIPHERAL CONTROL WORD REGISTER ACCEPTS 8 BIT CONTROL WORD WRITTEN BY MP CAN ONLY BE WRITTEN ( NOT READ) CONTROL WORD CHOOSES ONE OF THE SIX MODES OF OPERATION senthil/ECE/CCET

NO OPERATION ( TRISTATED ) CS’ RD’ WR’ A1 A0 OPERATION 1 WRITE COUNTER 0 WRITE COUNTER 1 WRITE COUNTER 2 WRITE CONTROL WORD READ COUNTER 0 READ COUNTER 1 READ COUNTER 2 NO OPERATION ( TRISTATED ) X 8254 NOT SELECTED senthil/ECE/CCET

8254 PIN DIAGRAM LOGIC PINOUT 24 PIN IC DIP PACKAGE +5V POWER SUPPLY HMOS TECHNOLOGY senthil/ECE/CCET

CONTROL WORD FORMAT senthil/ECE/CCET

8254 modes of operation MODE 0 INTERRUPT ON TERMINAL COUNT MODE 1 PROGRAMA-BLE MONOSHOT MODE 2 RATE GENERATOR MODE 3 SQUARE WAVE GENERATOR MODE 4 SOFTWARE TRIGGERED STROBE MODE 5 HARDWARE TRIGGERED STROBE senthil/ECE/CCET

Modes of operation Mode 0: INTERRUPT ON TERMINAL COUNT The output becomes a logic 0 when the control word is written Remains low even after count value loaded in counter Counter starts decrementing after falling edge of clock The OUT goes high upon reaching the terminal count & remains high till reloading OUT can be used as interrupt Writing a count register , when previous counting is in process  first byte when loaded stops the previous count,  second byte when loaded starts new count Gate high  normal counting Gate low  counting terminated and current count latched till GATE goes high again senthil/ECE/CCET Advanced Microprocessor

Mode 0: INTERRUPT ON TERMINAL COUNT senthil/ECE/CCET

Mode 1: One-shot mode. monostable multivibrator gate input is used as trigger input output remains high till the count is loaded After application of trigger, output goes low and remains low till count becomes zero Another count loaded, when output already low it does not disturb counting until a new trigger is applied at the gate New counting starts after new trigger pulse senthil/ECE/CCET

Mode 1: One-shot mode senthil/ECE/CCET

Mode 2: RATE GENERATOR / DIVIDE BY N COUNTER When N is loaded as count  after N pulses  OUT goes low for only one clock cycle then, count N is reloaded  OUT becomes high for N clock pulses The number of clock pulses between the two low pulses is equal to the count loaded gate  logic 0  no counting Gate  logic 1  normal counting senthil/ECE/CCET

Mode 3: SQUARE WAVE RATE GENERATOR When count N loaded is even  output remains HIGH for half the count and LOW for the rest half of the count When count N loaded is odd  output remains HIGH for (N+1)/2 and low for (N-1)/2. Repeated operation gives square wave Generates a continuous square-wave with G set to 1. If count is even, 50% duty cycle otherwise OUT is high 1 cycle longer. senthil/ECE/CCET Advanced Microprocessor

Mode 3: square wave generator senthil/ECE/CCET

Mode 4: Software triggered Strobe After mode is set output goes high When count is loaded counting down starts On reaching terminal count output goes low for only one clock cycle, and then again output goes HIGH The above said low pulse can be used as a strobe for interfacing MP with peripherals When GATE is LOW  counting is inhibited and count is latched If a new count is loaded while counting, previous counting stops and new counting started in next clock cycle senthil/ECE/CCET

Mode 4: Software triggered Strobe senthil/ECE/CCET

Mode 5: Hardware triggered Strobe This mode generates a strobe in response to the rising edge at the trigger Mode is used to generate a delayed strobe in response to an externally generated signal Once mode is programmed and counter loaded, OUT goes HIGH Counter starts counting after the rising edge of the trigger (GATE) The OUTPUT goes LOW for one clock period, when the terminal count is reached Output will not go LOW until the counter content becomes zero after the rising edge of any trigger GATE is used as trigger input senthil/ECE/CCET Advanced Microprocessor

Mode 5: Hardware triggered Strobe senthil/ECE/CCET

senthil/ECE/CCET Advanced Microprocessor

Read Operations Simple read operation : There are three possible methods for reading the counters: a simple read operation the Counter Latch Command the Read-Back Command Simple read operation : The Counter which is selected with the A1, A0 inputs, the CLK input of the selected Counter must be inhibited by using either the GATE input or external logic. Otherwise, the count may be in the process of changing when it is read, giving an undefined result. senthil/ECE/CCET Advanced Microprocessor

Counter Latch Command: SC0, SC1 bits select one of the three Counters two other bits, D5 and D4, distinguish this command from a Control Word If a Counter is latched and then, some time later, latched again before the count is read, the second Counter Latch Command is ignored. The count read will be the count at the time the first Counter Latch Command was issued. senthil/ECE/CCET Advanced Microprocessor

Read-back control command: The read-back control, word is used, when it is necessary for the contents of more than one counter to be read at a same time. Count : logic 0, select one of the Counter to be latched Status : logic 0, Status must be latched to be read status of a counter and is accessed by a read from that counter senthil/ECE/CCET Advanced Microprocessor

Status register: shows the state of the output pin check the counter is in NULL state (0) or not how the counter is programmed senthil/ECE/CCET Advanced Microprocessor