Differential Amplifier amplifies the difference between two input voltages rejects the average or common mode value of the two voltages v+, v-, vo are single ended Diff-mode input: vid=v+ - v- Com-mode input: vic=(v+ + v- )/2 vo =Avcvic + Avdvid Avd: Diff voltage gain, Avc: CM voltage gain Com-mode rejection ratio: Avd/Avc

Differential Amplifier Input common-mode range (ICMR) vic range over which Avd remains the same Computed by requiring all MOST affected by vic to be in saturation Output offset voltage Vos(out) Voltage at vo when vid = 0 Input offset voltage Vos vid that is needed to make vo = 0 When we say offset, default is input offset Vos= Vos(out)/Avd, if Vos(out) is in linear range

Differential Input, single-ended output single stage Amplifier Vm N-Channel vin- vin+ When vid=0, Vo=Vm. So, Vos-out= Vm-VoQ, Vos-in= (Vm-VoQ)/Avd

Large Signal Eq. in a N-channel Differential pair =0.5b1(VGS1-VT)2 =(2ID1/b1)0.5 iD1=0, when iD2=ISS and VGS2=VT+(2ISS/b)0.5

Solving for iD1 and iD2 iD1=iD2=ISS/2 VON1=VON2=(ISS/b)0.5

INPUT COMMON MODE RANGE VG1=VG2=ViCM VSDSAT1=VSDSAT2 =VOD1 VD1=VD3= VSS+VT3+VOD3 VG1min=VD1-|VT1| =VSS+VOD3+DVT VG1max=VDD- VSD5SAT-|VT1|-VOD

Output Range Vomin=Vss+Von4 Vomax=Vicm –|VT2| So what’s the vo range What’s for the N-ch circuit.

SMALL SIGNAL ANALYSIS AV

Common Mode Equivalent Circuit, with perfect match iC1=VIC/(1/gm1 +2rds5) ro1≈1/gm3 ACM≈ 1/ 2rds5gm3 iC1

SLEW RATE: the limit of the rate of change of the output voltage C’Ldvo/dt=i4-i2 ISS Max |CLdvo/dt|=ISS ISS Slew Rate = ISS/C’L ISS Output swing: Vosw GB frequency: fGB vo(t)=Voswsin(2pfGBt) Max dvo/dt =Vosw2pfGB To avoid slewing: ISS > C’L Vosw2pfGB

Parasitic Capacitances CT: common mode only CM: mirror cap = Cdg1 + Cdb1 + Cgs3 + Cgs4 + Cdb3 COUT = output cap = Cbd4 + Cbd2 + Cgd2 + CL

Cross CM disturbance After feed back, V+ very close to V-. Vcs  0. Vcs  vic

how should the bulk be connected how should the bulk be connected? Connect to source or connect n-well to VDD p-well to VSS

Approximate transfer function AV(s) = AV/(s/p1─1) Impedances rout = rsd2 || rds4 = 1 / (gds2 + gds4) rM = 1/gm3 || rds3 || rds1 ≈ 1/ gm3 Hence the output node is the high impedance node When vi=0, slowest discharging node is output node with dominant pole p1 = -1/(C’outrout), where C’out = Cout+ Cgd4 Approximate transfer function AV(s) = AV/(s/p1─1)

Gain bandwidth product Gain AV(0) = gm1 / (gds2 + gds4) Bandwidth ≈ |p1| ≈ (gds2 + gds4) / C’out GBW ≈ gm1 / C’out gm1 = {2*ID1mCoxW1/L1}½ increase gm1  increase GBW increase W1  increase GBW But C’out has Cdb2 and Cgd2  W1 Once Cdb2 and Cgd2 become comparable to CL, increasing W1 reduces GBW

An approximation of TF: AV(s)=AV(s/z1-1)(s/z2-1)/(s/p1-1)(s/p2-1) If p1 is dominant, |p1|<<|p2|,|z1|,|z2|; AV(s)≈AV/(s/p1-1) If p1 is non-dominant, at low frequency, AV(s)≈AV /(s/p1+s/p2-s/z1-s/z2 -1) 1/peq≈ 1/p1+1/p2-1/z1-1/z2 ≈ 1/p1+1/p2-1/z2 , since |z1| >> |z2|, |p1|, |p2|; ≈ 1/p1, if AV4 is not very large In either case, BW ≈ p1

frequency response AV w -90 PM -180 All in abs val z1 w p1 p2 z2 UGF -90 PM -180 Small CL and small gm3: gm1/CL’ > gm3/Cgs3

frequency response AV w -90 PM -180 Large CL, gm1/CL < gm3/2Cgs3 All in abs val UGF w z1 p2 p1 z2 -90 PM -180 Large CL, gm1/CL < gm3/2Cgs3

Observations PM ≈ 90 – tan-1(UGF/z1) If z2 not = p2, UGF < AV*p1 GBW should be at least 2~3 times lower than z1 to ensure good phase margin at UGF There is conflict between AV and PM If z2 not = p2, UGF < AV*p1 Design approaches make z1 high  higher than UGF make Cgd2 small, gm1 large make z2 close to p2  better 1st order approx. make AV4 small make p1 low  large AV make gds2 and gds4 small

NOISE Model

Input equivalent noise source

Total output noise current is found as, Let Then