Regular Expression Manipulation FSM Model

Slides:



Advertisements
Similar presentations
ENGIN112 L23: Finite State Machine Design Procedure October 27, 2003 ENGIN 112 Intro to Electrical and Computer Engineering Lecture 23 Finite State Machine.
Advertisements

Chapter #8: Finite State Machine Design 8
Finite-state Recognizers
CSE 311 Foundations of Computing I
4b Lexical analysis Finite Automata
CMPS 3223 Theory of Computation
Lecture 24 MAS 714 Hartmut Klauck
State-machine structure (Mealy)
Nondeterministic Finite Automata CS 130: Theory of Computation HMU textbook, Chapter 2 (Sec 2.3 & 2.5)
TOPIC : Finite State Machine(FSM) and Flow Tables UNIT 1 : Modeling Module 1.4 : Modeling Sequential circuits.
Give qualifications of instructors: DAP
1 1 CDT314 FABER Formal Languages, Automata and Models of Computation Lecture 3 School of Innovation, Design and Engineering Mälardalen University 2012.
Circuits require memory to store intermediate data
CS 151 Digital Systems Design Lecture 21 Analyzing Sequential Circuits.
1 Introduction to Computability Theory Lecture3: Regular Expressions Prof. Amos Israeli.
1 Introduction to Computability Theory Lecture12: Decidable Languages Prof. Amos Israeli.
1 Introduction to Computability Theory Lecture4: Regular Expressions Prof. Amos Israeli.
1 Introduction to Computability Theory Lecture3: Regular Expressions Prof. Amos Israeli.
Costas Busch - RPI1 Single Final State for NFAs. Costas Busch - RPI2 Any NFA can be converted to an equivalent NFA with a single final state.
ECE 331 – Digital System Design
Languages. A Language is set of finite length strings on the symbol set i.e. a subset of (a b c a c d f g g g) At this point, we don’t care how the language.
Equivalence, DFA, NDFA Sequential Machine Theory Prof. K. J. Hintz Department of Electrical and Computer Engineering Lecture 2 Updated and modified by.
1 Regular Expressions. 2 Regular expressions describe regular languages Example: describes the language.
Morphisms of State Machines Sequential Machine Theory Prof. K. J. Hintz Department of Electrical and Computer Engineering Lecture 7 Updated and adapted.
Regular Languages Sequential Machine Theory Prof. K. J. Hintz Department of Electrical and Computer Engineering Lecture 3 Comments, additions and modifications.
Fall 2004COMP 3351 Single Final State for NFA. Fall 2004COMP 3352 Any NFA can be converted to an equivalent NFA with a single final state.
Give qualifications of instructors: DAP
Languages. A Language is set of finite length strings on the symbol set i.e. a subset of (a b c a c d f g g g) At this point, we don’t care how the language.
CS Chapter 2. LanguageMachineGrammar RegularFinite AutomatonRegular Expression, Regular Grammar Context-FreePushdown AutomatonContext-Free Grammar.
ECE 301 – Digital Electronics Introduction to Sequential Logic Circuits (aka. Finite State Machines) and FSM Analysis (Lecture #17)
ECE 331 – Digital Systems Design Introduction to Sequential Logic Circuits (aka. Finite State Machines) and FSM Analysis (Lecture #19)
Behavioral Equivalence Sequential Machine Theory Prof. K. J. Hintz Department of Electrical and Computer Engineering Lecture 7 Modifications and updates.
Sequential circuit design
Zvi Kohavi and Niraj K. Jha 1 Capabilities, Minimization, and Transformation of Sequential Machines.
Unit 14 Derivation of State Graphs
Nondeterministic Finite Automata CS 130: Theory of Computation HMU textbook, Chapter 2 (Sec 2.3 & 2.5)
Theory of Computation, Feodor F. Dragan, Kent State University 1 Regular expressions: definition An algebraic equivalent to finite automata. We can build.
Introduction to CS Theory Lecture 3 – Regular Languages Piotr Faliszewski
1 Sequential Machine Theory Prof. K. J. Hintz Department of Electrical and Computer Engineering Lecture 1 Adaptation to this.
4b 4b Lexical analysis Finite Automata. Finite Automata (FA) FA also called Finite State Machine (FSM) –Abstract model of a computing entity. –Decides.
Module : FSM Topic : types of FSM. Two types of FSM The instant of transition from the present to the next can be completely controlled by a clock; additionally,
Introduction to State Machine
DLD Lecture 26 Finite State Machine Design Procedure.
Morphisms of State Machines Sequential Machine Theory Prof. K. J. Hintz Department of Electrical and Computer Engineering Lecture 8 Updated and adapted.
VHDL Discussion Finite State Machines IAY 0600 Digital Systems Design Alexander Sudnitson Tallinn University of Technology 1.
1Sequential circuit design Acknowledgement: Most of the following slides are adapted from Prof. Kale's slides at UIUC, USA by Erol Sahin and Ruken Cakici.
Donghyun (David) Kim Department of Mathematics and Physics North Carolina Central University 1 Chapter 1 Regular Languages Some slides are in courtesy.
UNIT - I Formal Language and Regular Expressions: Languages Definition regular expressions Regular sets identity rules. Finite Automata: DFA NFA NFA with.
Lecture # 15. Mealy machine A Mealy machine consists of the following 1. A finite set of states q 0, q 1, q 2, … where q 0 is the initial state. 2. An.
Finite Automata Great Theoretical Ideas In Computer Science Victor Adamchik Danny Sleator CS Spring 2010 Lecture 20Mar 30, 2010Carnegie Mellon.
Sequential Circuit Design 05 Acknowledgement: Most of the following slides are adapted from Prof. Kale's slides at UIUC, USA.
Mealy and Moore Machines Lecture 8 Overview Moore Machines Mealy Machines Sequential Circuits.
Lecture 15: Theory of Automata:2014 Finite Automata with Output.
Behavioral Equivalence
© Copyright 2004, Gaetano Borriello and Randy H. Katz
Lexical analysis Finite Automata
Introduction Introduction to VHDL Entities Signals Data & Scalar Types
Deterministic FA/ PDA Sequential Machine Theory Prof. K. J. Hintz
Busch Complexity Lectures: Reductions
Single Final State for NFA
Equivalence, DFA, NDFA Sequential Machine Theory Prof. K. J. Hintz
Sequential circuit design
CSE 370 – Winter Sequential Logic-2 - 1
Regular Expression Manipulation FSM Model
4b Lexical analysis Finite Automata
4b Lexical analysis Finite Automata
EGR 2131 Unit 12 Synchronous Sequential Circuits
Behavioral Equivalence
NFAs accept the Regular Languages
Presentation transcript:

Regular Expression Manipulation FSM Model Sequential Machine Theory Prof. K. J. Hintz Department of Electrical and Computer Engineering Lecture 5 Modifications by Marek Perkowski

Null Machine 3 Methods for Proving That a Machine Accepts No Words By inspection Any path from the start state to a final state means that at least one word is accepted by the machine By state diagram manipulation If a final state is relabeled as a start state, then the machine must accept at least one word

Null Machine By converting the regular expression into a deterministic FA If possible, FA must accept at least one word Conversion to FA may not be possible Machine may have no final states. There is no path from the initial state to any final state. Give examples

Reachability Analysis Reachability analysis will show that this machine will never reach the final state starting from initial state. Show it. Discuss reachability for computer hardware and robotics

State Diagram Manipulation A procedure to determine if a machine accepts no strings Remove all edges (arrows) to the start state. From the start state, identify all single-step “next states.” Relabel these “next states” as start states and eliminate the edges used to get there. go to (b) If a final state is relabeled as a start state, then the machine must accept at least one word.

State Diagram Manipulation Does Not Accept Any Word Since There Is No Path From - To +. The final state is not reachable

The Complement Machine A Complement Machine Accepts All Expressions Other Than Those Accepted by the Original Machine Method Change all non-final states into final states Change all final states into non-final states Leave start state unchanged

Language Decidability Methods for Determining If Two Regular Expressions Define the Same Language Language Enumeration with 1:1 correspondence between the 2 languages. The regular languages can be accepted by identical FAs. Generate This example demonstrates why it is useful to be able to check if language is empty This is like xor of languages

Language Overlap If the Overlap Language Is NOT the Null Set, Then There Is Some Word in L1 Which Is Not Accepted by L2 and Vice Versa. If the Overlap Language Accepts the Null String, Then the Languages Are Not Equal.

DeMorgan’s Theorem Applies Equally Well to Sets As Well As Boolean Algebra

Regular Expression Equivalence Methodology Construct the complement machines Apply DeMorgan’s theorem since it is difficult to form the intersect machine Show some special cases when it is easy to create the intersect machine

Regular Expression Equivalence Take the Unions of the Complemented and Non-complemented Several Times to Determine whether Language overlap is the Null Set or not

RE Equivalence Example* Two REs are represented by their equivalent FAs (FA1 does = FA2) *Cohen, Prob. 2, page 233. state Try to use first machine minimization method and isomorphism Obviously looking at these two machines we see that they are equivalent, but how to prove it?

RE Equivalence Example Form the Complement Machines

RE Equivalence Example Make the Product Machine of FA2 and the Complement of FA1.

RE Equivalence Example States of Product Machine, FA1-bar & FA2 Only One Start State / Multiple Final States

Product Machine State Table States of Product Machine, FA1-bar & FA2 State Diagram of Product

Reduced State Diagram Non-Reachable States 2,4,6, are Removed

RE Equivalence Example Take the Complement Of the Union by changing final states to non-final and vice-versa No Final States, So Complement FA Accepts No Words

RE Equivalence Example Do the Same for the Right Term of Loverlap

RE Equivalence Example Application of Same Procedure to Preceding Machine Also Results in No Recognizable Words. Since Both Terms of Loverlap are Null, Then REs Are Equivalent Since Their Union Is Null. Finally we proved that these two machines are equivalent without the need to minimize them.

Moore & Mealy Machines The Behavior of Sequential Machines Depends on Previous Inputs. Moore Machine Output only depends on present state Mealy Machine Output depends on both the present state and the present input

Moore & Mealy Machines Equivalent Descriptive Methods Transition (state) table Transition (state) diagram Operational descriptions using set theory (Language recognized by the machine)

Moore Machine Input Comb Ckt Present State Output Comb Ckt Memory Output Is Only a Function of Present State

Primitive State Diagram, Moore Legend state/ output input A/0 C/0 D/0 B/1 etc. off on

Moore Machine State Diagram Legend s1s0/z x1x0 00/1 10/1 11/1 01/0 etc. 00 10 01

Mealy Machine Input Comb Ckt Present State Output Comb Ckt Memory Output Is Function of Present State AND Present Input

Primitive State Diagram, Mealy Legend state input/output A C D B etc. off/1 on/0 off /0

Mealy Machine State Diagram Legend s1s0 x1x0 /z 00 10 11 01 etc. 00 /1 10 /0 01 /1

Transition Table

FSM Design Approaches “One-Hot” Binary Coded State One flip-flop is used to represent each state Costly in terms of discrete hardware, but trivial to design Efficient in FPGAs because FF part of each CLB Binary Coded State n flip-flops used to store 2n states Most efficient Need to account for unused states Review the one-hot coded machines and transition from non-deterministic to deterministic. Discuss parallel state machines and similar diagrams like Petri nets

FSM and Clocks Synchronous FSMs may change state only when a unique input, the clock, occurs Asynchronous FSMs may change state when input changes Next state depends on present input and present state for both Moore and Mealy

Synchronous versus Asynchronous Machines in Design Synchronous FSMs Easier to design, turn the crank Slower operation Asynchronous Harder to design because of potential for races, iterative solutions Faster operation

Mealy “0101” Detector M = ( S, I, O, d, b ) S: { A, B, C, D } O: { 0, 1 } = { not detected, detected} d: next slide b: next slide

Mealy Transition/Output Table Next State/Output

“0101“ State Diagram ‘1’/0 ‘0’/0 A D C B ‘0’/0 ‘1’/0 ‘0’/0 ‘1’/0 ‘1’/1 This machine detects sequence whenever it appears, mention smart house for disabled and heart attack devices ‘0’/0 ‘1’/0 ‘0’/0 ‘1’/0 ‘1’/1 ‘0’/0

Moore “0101” Detector M = ( S, I, O, d, l ) S: { A, B, C, D, E } O: { 0, 1 } = { not detected, detected} d: next slide l: next slide

Moore Transition/Output Table Next State

Moore “0101“ State Diagram ‘0’ ‘1’ ‘0’ detected ‘0’ A/0 B/0 ‘0’ ‘1’ One state more.

Sequential Machines Problems Three Problems of Sequential Machines State minimization problem Determine all equivalent states of a sequential machine, and, Eliminate redundant states Machine Decomposition Separate large machines into an interconnected set of smaller machines Easier to design and analyze small machines Instead to minimize, create minimal machine in first run. Instead to decompose, create decomposed machine in first run. Good but not always realistic advises:

Sequential Machine Problems State assignment problem There is no guidance on which binary number to assign to which state in a primitive state table Complexity of implementation is dependent on mapping of states to binary numbers Unsolved problem Design all machines and compare Benefit of decomposition of large machine into smaller machines.

Set Theoretic Description Moore Machine is an ordered quintuple

Set Theoretic Description Mealy Machine is an ordered quintuple

Recursive Definitions of Delta State Transition for Moore & Mealy Single-valued, else not deterministic. At least a partial function Not necessarily injective or surjective Shield’s nomenclature

Recursive Definitions of Delta

Recursive Definitions of Beta Causal, No Output for No Input. For a Given Input Sequence, There Will Be a Deterministic Output Sequence of the Same Length As the Input.

Recursive Definitions of Lambda Same Caveats As Beta sk sk-1

Possible Exam Problems Find if two state machines (of any type, Mealy, Moore or Rabin-Scott) describe the same regular language. Find if a machine describes an empty language. Find a regular language accepted by arbitrary type state machine, specified in any way (graph, table,etc.). Find the intersection, the union, the difference of two machines M1 and M2. Find a negation of a machine M.

Possible Exam Problems Find Mealy Machine for arbitrary sequence detection. Find Moore Machine for arbitrary sequence detection, finite or infinite sequence over arbitrary alphabet. Convert a Mealy Machine to an equivalent Moore Machine. Convert a Moore Machine to an equivalent Mealy Machine.