Overview of the LHCb Calorimeter Electronics … focus in the ECAL/HCAL

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Presentation transcript:

Overview of the LHCb Calorimeter Electronics … focus in the ECAL/HCAL Frédéric Machefert (LAL, Orsay) On behalf of the LHCb calorimeter group Calor2004 at Perugia, March 31st 2004

Front-end partly common Calorimeter System Requirements: Energy / Position measurements Identification of hadrons, electrons, γ, π0 L0 Trigger input (SPD/PRS/ECAL/HCAL): High sensitivity & Fast response (40MHz) No electronics pile-up (25 ns shaping) SPD-PRS Very front-end Front-end Crates Power Supply Scintillating Pad Det (SPD) Preshower (PRS) Scint. Pad + Fibres+ MAPMT 5953 cells each ECAL Shashlik (Pb-scint.) 5953 cells HCAL Tiles (Iron-scint.) 1468 cells Front-end partly common same crates same electronics same crates Calibration Power supply March 31st, 2004 Calor 2004

Electronics Overview: SPD - PRS VFE Light transporter by clear fibers to 64 anode PMT very front-end away from beam : no radiation problem Dynamic range : 0 – 100 MIPs and accuracy required ~ 10% PRS : electron/pion separation  10 bits SPD : photon/mip separation  1 bit 20 – 30 photo-electrons per MIP  large fluctuations 25 ns integrator mounted on the PMT – Reset with switches Cheap and maximum use of the photo-electrons Potentially more sensitive to noise, drift of pedestal and switch time versus beam crossing SPD Threshold (1.5MeV  0.5MIP) MeV March 31st, 2004 Calor 2004

SPD and PRS ASIC PRS SPD LSB is fixed to 1/10 of MIP Proper precision 25 ns integration contains ~80% of the charge Two parallel integrators running at 20MHz and multiplexed at the output Differential chips Need to remove ~20% of the previous sample PRS SPD LSB is fixed to 1/10 of MIP Proper precision Dynamic coverage The integrator drives a 10bit ADC Threshold is low and need to remove 20% of previous sample Threshold comparison Digital Output (one bit) LVDS serializers See following talk by Stéphane Monteil… Production Readiness Review passed March 31st, 2004 Calor 2004

Electronics Overview ECAL - HCAL PMT are located (partly) in high radiation area (0.4Mrad/year) Signal transported to shaper/integrator by coax cable Dynamic range is 0 - 10GeV/c (Et) ECAL resolution: 10%/E1% HCAL resolution: 80%/E10% Typically 500-1000 photo-electrons / GeV (50) in ECAL (HCAL) PM pulses shaped to 25ns before integration (delay line clipping) 12 bit ADC Noise max require ~ 1 ADC March 31st, 2004 Calor 2004

ECAL – HCAL ASIC Shaping and integration Pulse shaping in 25 ns Residue < 1% after 25 ns Integrator plateau : 4 ns Linearity < 0.5% Rise time ~ 5 ns INTEGRATOR INPUT SIGNAL Already produced and tested T0 T0+25ns T0+50ns ADC INPUT SIGNAL March 31st, 2004 Calor 2004

Level 0 trigger Level-0 trigger : Hardware system Pipelined operations, fully synchronous, with fixed latency (4ms) Reduce rate from 40MHz to 1MHz Detector used : Vertex detector, Muon and Calorimeter (SPD, PRS, ECAL and HCAL) Select High Pt particles Because of the B meson high mass, at least one decay particle has a high Pt (several GeV/c) Calorimeter trigger works for electron, photon and neutral pions : ECAL deposits Hadrons : HCAL deposits SPD-PRS : particle identification Logic based on Et on 2x2 cell area Value converted to 8 bits and sum cell Et Access neighbours Either from the same board Or connect several boards/crate : dedicated backplane for connections Keep only the highest local Et deposit Calorimeter used to reject busy events at the trigger level : SPD multiplicity March 31st, 2004 Calor 2004

Trigger and readout architecture WALL L1, HLT, DAQ TTC, ECS March 31st, 2004 Calor 2004

ECAL – HCAL: Front-end digital electronics Digital data treatment (x8/x4): Channel synchronisation Pedestal correction Trigger 8-bit generation: Calibration 5 GeV/c saturation Data: L0 latency (256 deep) Derandomizer (16 deep) Analog Part Time Adjust. Trigger data treatment: Send to neighbours Receives from neighbours Make 2x2 sums Sends maximum ECS Power Regulators Protections Event Builder – Control : Header (evt id, evt type, …) 32 channels Trailer (parity, …) March 31st, 2004 Calor 2004

Dedicated backplane ECS Power Supply Clock Trigger Readout Boards/crate interconnections March 31st, 2004 Calor 2004

Very efficient: the fragment is directly sent through the component ! Radiation problems Potential problems: Accumulated doses (200 rad/year at the level of the racks) : 2krad in 10 years Single Event Effects (SEE): Single Event Upset (SEU) – bit-flip in re-programmable FPGA/RAM Single Event Latchup (SEL) – possibly destructive “short-circuit” In LHCb, main worry comes from neutron flux MeV-1.cm-2.y-1 Neutrons Components have been irradiated Centre de Proton-Thérapie (Orsay) Proton (108cm-2.s-1 ,200MeV) GANIL (Caen): Heavy Ions Krypton, 73MeV/A & 58MeV/A, (105cm-2.s-1) Spectrum (electronic area) Very efficient: the fragment is directly sent through the component ! E(MeV) March 31st, 2004 Calor 2004

Irradiation tests Typical dose effects starts to be observed only after 50 krad → OK ! SEU quite easily observed Protections implemented : Registers are protected Triple Voting (majority vote among three copies of the register) Parity bit coded in the data FPGA configuration protected intrinsically Anti-fuse FPGA (ACTEL ) SEL have been observed with typical flux corresponding several LHCb years Very pessimistic assumptions included in the rate estimations Never been destructive power cycle use MAX power switch component (tested at GANIL! Delay Chip protection: from every 3 days to every 300 years! SEU cross-section measured at GANIL March 31st, 2004 Calor 2004

ECAL – HCAL electronics performances Performances have been tested with a prototype of the board at CERN (test beam) on a dedicated test bench March 31st, 2004 Calor 2004

ECAL – HCAL electronics performances Signal ECAL FE Board FE board / Lecroy ADC Lecroy ADC 1ns HCAL 1ns FE board / Lecroy ADC TDC Test beam results By comparing FE and Lecroy (long int.) Linearity measurements Taking into account particle time arrival in the coincidence window Plateau width/shape effects (<1%) TDC March 31st, 2004 Calor 2004

Electronics performances : noise Noise measured from 10 consecutive (40MHz) samples (no input signal) Incoherent noise (2  t) 2 (t) = 0.60 + 0.02 x t ADC2 Coherent noise (  t)  (t) = 0.08 + 0.5 x 10-2 x t ADC 2 t Intrinsic ADC noise 2 t2 Extrapolation to a typical 3x3 cluster : Coherent noise : 3.5 ADC Incoherent noise : 2.4 ADC March 31st, 2004 Calor 2004

AMS 0.8u BiCMOS technology Conclusion SPD, PRS and ECAL/HCAL are specific detectors Provide L0 input for trigger decision Three ASIC have been designed for the readout of the four Detectors SPD  Barcelona PRS  Clermont-Ferrand ECAL/HCAL  Orsay Common system wherever possible Digital electronics design (front-end board) partly common Same crate with a dedicated backplane for trigger treatment Components have been tested for irradiation Dose is OK – SEE protection taken into account in the design Electronics fulfill requirements Front-end board series production in automn 2004 AMS 0.8u BiCMOS technology March 31st, 2004 Calor 2004