Xilinx/Model Technology Powerful FPGA Verification Solution 1

Xilinx - MTI Advantage Committed Partnership Complete support for HDLs (VHDL, Verilog), VITAL 95 and SDF 2.1 for backannotating timing delays Automatic generation of VHDL, Verilog and SDF by the Place & Route tools Same testbench is used for both functional & timing level simulation Verified VHDL & Verilog libraries for all architectures Xilinx is committed to providing the best HDL integration to the existing tools and methodologies. Xilinx has the same level of support for both VHDL and verilog and endorse both languages at the same level. The Place and Route tools automatically generate VHDL and Verilog structural netlist and backannotate timing in the SDF 2.1. 2

Consider Model Technology & Xilinx MTI delivers for Xilinx Technology & Market leadership in VHDL simulation Represents the best value as measured by price & performance Effectively handles large designs at both RTL & gate levels Model Technology is the recognized leader in VHDL simulation and represents the best value as measured by price and performance. 3

Product Matrix Product Features ModelSim/VHDL Most popular VHDL simulator Fast Compile Time Intuitive User Interface Standard support ModelSim/ Verilog Fully Featured Verilog Both Gate-level & RTL Fast Compile times ModelSim/PLUS Single Kernel simulator for mixing both Verilog & VHDL 4