Single Value Processing Multi-Threaded Process

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Presentation transcript:

Single Value Processing Multi-Threaded Process M. Smith, Electrical and Computer Engineering, University of Calgary, smithmr @ ucalgary.ca 1/17/2019

Timing Frequency Domain 1/N F-1[X1(k)X2(k)] 1024 point FFT (2 * NLOG2N) 1024 MULTS (N) 1024 point INV FFT (NLOG2N) Time Domain 1/N ∑ x1 (n) * x2(n) n = 0 1024 MACs (N) 1024 Phases (N) 30,000 Complex operations N-1 1,048,576 operations (N2) 1/17/2019

Implementing a multi-thread system working on batch data Collect N pts @ 44 kHz  array1 Collect N pts @ 44 kHz  array2 Collect N pts @ 44 kHz  array3 Process array1 Process array2 Process array3 Process array4 Transmit N pts @ 44 kHz  array1 Transmit N pts @ 44 kHz  array2 Transmit N pts @ 44 kHz  array3 1/17/2019

Implementing a multi-thread system -- Laboratory 5 concepts Collect N pts @ 44 kHz  array1 Collect N pts @ 44 kHz  array2 Collect N pts @ 44 kHz  array3 Move array1  array4 SimulateComplex Move array2  array5 SimulateComplex Move array3  array6 SimulateComplex Transmit N pts @ 44 kHz  array4 Transmit N pts @ 44 kHz  array5 Transmit N pts @ 44 kHz  array6 1/17/2019

Essentially Take an audio Talk-through program for loop { Read_a_sample; Perform operation; Write_a_sample; } Turn into 5-threads running under interrupts Idle thread Initialization thread – sets up system, when ready – launches the other threads – then activates the first thread ReadValueThread, ProcessValueThread – with simulated Complex Algorithm WriteValueThread 1/17/2019

Essential, if not exact, concept of multi-threading code Do all the initial preparation of the board Set up stack Set up “C/C++” environment Set up processor timer Default on Blackfin ADSP-BF533 board – every 0.05 ms (called a TIC) an interrupt occurrs Start with an IDLE Thread When first TIC occurs – the interrupt handler will cause the Scheduler ISR to run 1/17/2019

Scheduler ISR Save all the registers (etc) of the IDLE thread to the IDLE thread context buffer Recover all the registers for the scheduler ISR context buffer (saved somewhere during the initialization procedure) There had better be a boot thread – otherwise system hangs VDK tool will not let you build a system without at least one boot thread Decide which boot thread has the highest priority? Save all the registers from the Scheduler ISR back into the context buffer Recover all the registers for the boot thread from its context buffer Return from ISR We have now performed a “context switch” between the IDLE thread and the BOOT thread. 1/17/2019

Boot thread The boot thread now executes until the first TIC occurs (next ISR call) We now switch back into Scheduler Save all the registers (etc) of the FIRST BOOT THREAD thread to the thread context buffer Recover all the registers for the scheduler ISR context buffer Other threads need launching? If there are other Boot threads then launch them depending on their priority and the ROUND ROBIN scheduling behaviour set by the programmer for tasks of equal priority If a boot thread has requested that other threads need launching then launch those. Unclear when the VDK::CreateThread operation occurs 1/17/2019

The launching of threads Looks like threads get launched “during a TIC” – meaning that another context switch occurs for each VDK::CreateThread ( ) Does that apply to VDK::PostSemaphores( ) too? 1/17/2019

Back in scheduler Other threads need launching? If there are other Boot threads then launch them depending on their priority and the ROUND ROBIN scheduling behaviour set by the programmer for tasks of equal priority If a boot thread has requested that other threads need launching then launch those. Have threads posted semaphores? Store them in a “posted semaphore table. Threads can also post “messages” but I have not worked that out yet Are threads pending semaphores? Depending on which task is running now, and its relative priority to tasks that are pending semaphores then either perform context switching or not How do you handle conflicts? I think that is my problem with my final version of Lab. 5 part 3 1/17/2019

Laboratory 5 – Done in “C and C++” Stage 1 – 30% Develop and investigate a multi-tasking system where the threads are free-running. Thread tasks are “Sleep(time_task)” Develop and investigate a multi-tasking system where the threads communicate through semaphores to control order of operation Stage 2 – 55% Demonstrate and investigate turning an “audio – talk-through program” into a multi-threaded system – one point processed per interrupt Stage 3 – 15% Demonstrate a batch processing system as a multi-threaded system Options Use SHARC ADSP-21061 boards (40 MHz) – existing audio-libraries – have not attempted Use Blackfin ADSP-BF533 boards (600 MHz) – existing audio-libraries – have been successful at home, but not here Use Blackfin ADSP-BF533 boards (600 MHz) – using very simple, no frills, audio-talk though library – surprising simple with 1 to 32 points being processed. Fails with 33 points. Code logic issue, not a timing issue as I can waste 25000 cycles per block at 32 points 1/17/2019

Original audio-talk through program ISR routine Channel to Channel Copy Multi-tasking version of ISR routine 1/17/2019

Step 1 – Add Talk-through program to Lab. 5 A multi threading example 1/17/2019

Step 2 – Investigate Thread Behaviour 1/17/2019

Step 3 – Fix Thread Behaviour 1/17/2019

Step 4 – Start migrating code to the various threads -- Fix ISR behaviour ORIGINAL NEW VERSION 1/17/2019

Fix Thread Behaviour Initialization thread ReadThread ProcessThread Creates other threads and then waits for ever ReadThread Moves my_In Value  Process Value ProcessThread Moves Process Value  ProcessDone Value Calls a “non-optimizable to nothing” routine SimulateMoreComplexProcess(cycles_to_waste) WriteThread Moves ProcessDone Value  my_Out Value 1/17/2019

Final ReadThread 1/17/2019

Final ProcessThread 1/17/2019

Final WriteThread 1/17/2019

Thread Behaviour depends on Task priorities ALL TASKS HAVE EQUAL PRIORITY WRITE TASK HAS HIGHER PRIORITY THAN PROCESS TASK 1) Read Task – sends semaphore to Process Task 2) Process Task – sends semaphore to Write Task and “starts to waste cycles” 3) Scheduler determines that Write Task can start, send semaphore to Read Task, and finish – and then 4) Scheduler lets Process Task finish (? Why not let Read Task restart?) 1/17/2019

Thread Behaviour Useless as system is “free running” and the signals input and output have no relationship to samples generated by ISR Some samples repeated many times, others are not Number of repeats depends on the time that ProcessThread takes to execute 1/17/2019

Need to add an ISR semaphore 1/17/2019

Read Thread – starts on ISR semaphore STANDARD APPROACH VDK::PostSemaphore( ) DOES NOT WORK Blackfin Assembly code looks like 68K With LINK, UNLINK, RTS instructions MACRO 1/17/2019

Many issues still need handling How much time is available before losing sound quality? What are the best priorities for the tasks, and does that priority depend on how much time is spent in ProcessTask? What is the best setting for the task scheduler TIC time (based on processor internal timer)? Too fast – too much time saving / recovering registers during task switching Too slow – problems with interrupts being missed or values being over-writtem 1/17/2019

Scheduling based on TIC time DEFAULT TIC = 0.05 ms TIC = 0.005 ms Don’t forget – TICs are shortened 1/17/2019

Which is the Slower / Faster TIC time? Question – how does the thread status history reflect sound quality? 1/17/2019

Tackled today Examined concepts of how multi-tasking is implemented Used Existing audio-talk though program and Lab. 5 multi-threading demonstration code Ended up with a multi-threading audio-talk through program that would give us an indication of how many cycles available when ProcessThread has increased complexity Final part of laboratory 5 (15%) is to turn the above code into a multi-tasking program that handle batches of data Slides available – but not tackled in class – check web I was able to get things working with up to batches of 32 data points, but things went astray after that and I have not solved the problem. Lab. 5 – demonstration together with short report explaining thread status diagrams 1/17/2019