Circuit Design Process

Slides:



Advertisements
Similar presentations
Programming Logic Gate Functions in PLCs
Advertisements

ECE 2373 Modern Digital System Design Exam 2. ECE 2372 Exam 2 Thursday March 5 You may use two 8 ½” x 11” pages of information, front and back, write.
Relationship Between Basic Operation of Boolean and Basic Logic Gate The basic construction of a logical circuit is gates Gate is an electronic circuit.
Chapter 4 Logic Gates and Boolean Algebra. Introduction Logic gates are the actual physical implementations of the logical operators. These gates form.
TDC 311 Digital Logic. Truth Tables  AND  OR  NOT  NAND  NOR  XOR  XNOR.
Chapter 5 Boolean Algebra and Reduction Techniques William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education,
Logic gates & Boolean Algebra. Introduction Certain components (called logic elements) of the computer combine electric pulses using a set of rules. Electric.
DeMorgan Theorem, Computer Simulation Exercises
Digital Electronics Combinational Logic An Overview.
Digital Electronics Lecture 4 Simplification using Boolean Algebra, Combinational Logic Circuit Design.
ACOE1611 Combinational Logic Circuits Reference: M. Mano, C. Kime, “Logic and Computer Design Fundamentals”, Chapter 2.
1 EG 32 Digital Electronics Thought for the day You learn from your mistakes..... So make as many as you can and you will eventually know everything.
Combinational Logic Design Process © 2014 Project Lead The Way, Inc.Digital Electronics.
Chapter 4 Fundamentals of Computer Logic 1 Chapter 4: Fundamental of Computer Logic - IE337.
Karnaugh Maps (K-Maps)
Circuit Design Process © 2014 Project Lead The Way, Inc.Digital Electronics.
Logic Gates and Boolean Algebra Introduction to Logic II.
Circuit Synthesis A logic function can be represented in several different forms:  Truth table representation  Boolean equation  Circuit schematic 
Sequential Logic An Overview
Universal Gate – NOR Universal Gate - NOR Digital Electronics
Universal Gate – NAND Universal Gate - NAND Digital Electronics
Dr.Ahmed Bayoumi Dr.Shady Elmashad
Logic Gates and Boolean Algebra
MTE3 on , Tuesday 9:00-10:15, 10:30-11:45 AM 414W - PAB
Homework Reading Machine Projects Labs
Universal Gate – NAND Universal Gate - NAND Digital Electronics
Exclusive OR Gate.
KS4 Electricity – Electronic systems
KS4 Electricity – Electronic systems
DIGITAL LOGIC CIRCUITS
XOR, XNOR, and Binary Adders
Programmable Logic Devices
Reading: Hambley Chapters
Universal Gate – NAND Universal Gate - NAND Digital Electronics
Basics Combinational Circuits Sequential Circuits
Karnaugh Maps (K-Maps)
Universal Gate – NOR Universal Gate - NOR Digital Electronics
Troubleshooting Circuits
Date of Birth Design Problem
Combinational Logic Design Process
Universal gates.
Boolean Algebra Digital Electronics
Karnaugh Mapping Karnaugh Mapping Digital Electronics
XOR, XNOR, & Binary Adders
Circuit Design Process
Karnaugh Mapping Digital Electronics
AOI Design: Logic Analysis
Universal Gate – NAND Universal Gate - NAND Digital Electronics
Karnaugh Mapping Karnaugh Mapping Digital Electronics
Homework Reading Tokheim, Section 5-10, 7-4.
Reading: Hambley Ch. 7 through 7.5
Date of Birth Design Problem
Karnaugh Mapping Digital Electronics
Logic Gates.
KS4 Electricity – Electronic systems
ECB2212-Digital Electronics K-Map
Universal Gate – NOR Universal Gate - NOR Digital Electronics
Combinational Logic - An Overview
Chapter 10.3 and 10.4: Combinatorial Circuits
AOI Design: Logic Analysis
Dr. Clincy Professor of CS
XOR, XNOR, and Binary Adders
Circuits, Truth Tables & Boolean Algebra
AOI Design: Logic Analysis
Circuit to Truth Table to Logic Expression
Department of Electronics
XOR, XNOR, and Binary Adders
Digital Logic Design Basics Combinational Circuits Sequential Circuits.
Combinational Logic - An Overview
Logic Gates By: Asst Lec. Besma Nazar Nadhem
Presentation transcript:

Circuit Design Process Troubleshooting Digital Electronics TM 1.3 Introduction to Digital Circuit Design Process Digital Electronics © 2014 Project Lead The Way, Inc. Project Lead The Way, Inc. Copyright 2009

Circuit Design Process Combinational Logic Design Process Digital Electronics  Word Problem - Identify and define the requirement specifications. What are the inputs? What are the outputs? Sometimes it is helpful to create a table that defines what is means for a specification to be “high” or “low”. Identify Circuit Types Required - What ICs are required and available for the design? Will any part of the circuit require an analog design? Is there combinational logic required? Is there sequential logic required? Is a clock signal needed? Do I have the necessary Datasheets? Pin diagrams? Truth Table for Combinational Logic Section Hand Calculations and Sketches of Initial Circuit Simulation Breadboard and Test Using Version #1 of the Combinational Logic Design Process, students will be able to design AOI based logic circuits from a given word problem. They will have the option to simplify the logic expression using Boolean algebra. Project Lead The Way, Inc. Copyright 2009

Circuit Design – Best Practices Combinational Logic Design Process Circuit Design – Best Practices Digital Electronics  Prototype and test the circuit incrementally. Don’t design and build the entire circuit only to find is does not work properly. It is easier to trouble shoot the circuit in sections rather than try and troubleshoot the complete circuit in its entirety. As you progress through this course, you will be introduced to advancements in technology and in the circuit design process itself. As you learn about these advancements you will be able to make even more choices that will help you design efficient circuits in shorter amounts of time. In this lesson we will learn about the circuit design process by exploring simple designs in combinational and sequential logic. Project Lead The Way, Inc. Copyright 2009

Combinational Logic Design Process Digital Electronics  Design Process Version #1 Word Problem Write Logic Expression Boolean Simplification AOI Logic Implementation Create Truth-Table NO Simplification Using Version #1 of the Combinational Logic Design Process, students will be able to design AOI based logic circuits from a given word problem. They will have the option to simplify the logic expression using Boolean algebra. Project Lead The Way, Inc. Copyright 2009

Combinational Logic Design Process Digital Electronics  Design Process Version #2 K-Mapping NOR Only Logic Implementation NAND Only Logic Implementation Word Problem Write Logic Expression Boolean Simplification AOI Logic Create Truth-Table NO Simplification Version #2 of the Combinational Logic Design Process adds two features to the design process. First, the students will be able to re-implement their AOI implementations into either NAND only or NOR only implementations, resulting in more efficient designs. Second, students will be able to utilize the Karnaugh mapping (K-Map) technique to simplify the logic expressions rather than using Boolean algebra. Project Lead The Way, Inc. Copyright 2009