1 Analysis and design for combinational logic circuit

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Presentation transcript:

1 Analysis and design for combinational logic circuit 1. 1. 1 Analysis method for combinational logic circuit Logical Graph logic expression simplify truth table function Purpose: ① whether input variable can satisfy requirement; ② change circiut structure(AND-OR NAND-NAND); ③ get standard AND-OR expression so as to construct circuit by MSI and LSI ; ④ get logic description of circuit function so as to analyze one circuit.

truth table expression Function [Example] Explain the function of following circuit truth table & ≥1 A B C Y 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 1 A B C [Solution] expression Function Identify whether input signals have the same sign.

2 Basic design method of combinational logic circuit Logic variable Truth table Expression Logic graph Logic variable: ① input and output variables; ② states are represented by 0 and 1; ③ write truth talbe; Simplification or transform

[Example 1] Design a vote circuit,output agrees with most of levels of three input variables. [Solution] (1) Logic abstraction ① Set variables: input A、B、C , output Y ② States assignment: A、B、C = 0 input is low level A、B、C = 1 input is high level Y = 0 most of inputs are low levels Y = 1 most of inputs are high levels

③ Write truth table A B C Y 0 0 0 0 0 1 0 1 0 0 1 1 1 1 0 0 1 0 1 1 (2)Write output expression and simplification A B C Y 0 0 0 0 0 1 0 1 0 0 1 1 1 1 0 0 Mini AND-OR Mini NAND-NAND 1 0 1 1 1 1 0 1 1 1 1 1

(3) Logic graph — using NAND gate A & B Y & ≥1 & C &

[Solution] (1)Logic abstraction Truth table Input: R(red) Y(yellow) [Example 2] Desigh a logic circuit which is used to monitor the operating states of a traffic light. On normal condition, one of red, yellow and green light should be on, otherwise, a failure occurs. [Solution] (1)Logic abstraction Truth table Input: R(red) Y(yellow) G(green) 1 -- on R Y G Z 0 -- off 0 0 0 1 1 -- Yes 0 0 1 Output: Z(有无故障) 0 1 0 0 -- No 0 1 1 1 (2) Karnaugh map YG 00 01 11 10 1 0 0 R 1 0 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1

(3) Logic graph & 1 ≥1 R G Y Z