Si2 Panel Discussion Design for 3D Standards, Ahead or Behind? Herb Reiter eda 2 asic Consulting, Inc June 2, 2014 1/17/2019

Designers of 2.5/3D Solutions Materials- & Equipment Vendors The Design Ecosystem Designers of 2.5/3D Solutions IC INFO & ORDERS PKG INFO & ORDERS Design Tools EDA Vendors Modeling Tools PrDK PaDK IC FABs AND OSATs Materials- & Equipment Vendors 1/17/2019

Design Standards, Ahead or Behind ? Optimizing Unit Cost, Reliability, Power, Performance and TTM requires tools There is a BIG difference between 2.5D- and 3D Design Challenges 3D memory- and 2.5D IC designers use proven tools and/or in-house solutions now Many 2.5D prototypes ongoing now, dozens of production-designs in progress Heterogeneous 3D designs MUST HAVE powerful STANDARDS-COMPLIANT tools support Larger portion of value creation shifting to packaging, assembly and test !!! Major cost reduction efforts in Packaging Materials and Methods ongoing Major cost increases by following Moore’s Law will accelerate consolidation Calls to Action: Educate SYSTEM- and IC designers Intensify EDA  OSAT dialog to lower cost Expand on JEDEC, SEMI, SEMATECH, Si2,.. Stds Review which 2.5D steps need EDA Standards Analyze value of die-level IP on interposers Look at 3D-ICs from SYSTEM-level perspective, then develop top-down FLOWS Define new business models, cooperate Source: Amkor POSSUMTM White Paper 1/17/2019

Face-to-Face Dice Stacking (1) 1/17/2019 Source: Amkor POSSUMTM White Paper