Lecture 9 Logistics Last lecture Last last lecture Today

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Lecture 9 Logistics Last lecture Last last lecture Today HW3 posted, due on Friday Lab3 this week Last lecture Verilog Last last lecture K-maps examples K-map high dimension example Don’t cares Today Don’t care (review) POS minimization with K-map Design examples with K-map 9

The “WHY” slide Don’t cares Design examples with K-map Sometimes the logic output doesn’t matter. When we don’t care if the output is 0 or 1, rather than assigning random outputs, it is best to denote it as “Don’t care.” If you learn how to use the “don’t care’s”, you will be able to build even more efficient circuits than without them. Design examples with K-map Doing K-map is fun, but when it is combined with an actual design problem you will see how k-map fits into the whole scheme of logic design. Class rule: Interrupt when you don’t understand why we are doing something 9

Revisit Don’t cares example: Truth table for a BCD increment-by-1 INPUTS OUTPUTS A B C D W X Y Z 0 0 0 0 0 0 0 1 0 0 0 1 0 0 1 0 0 0 1 0 0 0 1 1 0 0 1 1 0 1 0 0 0 1 0 0 0 1 0 1 0 1 0 1 0 1 1 0 0 1 1 0 0 1 1 1 0 1 1 1 1 0 0 0 1 0 0 0 1 0 0 1 1 0 0 1 0 0 0 0 1 0 1 0 X X X X 1 0 1 1 X X X X 1 1 0 0 X X X X 1 1 0 1 X X X X 1 1 1 0 X X X X 1 1 1 1 X X X X Function F computes the next number in a BCD sequence If the input is 00102, the output is 00112 BCD encodes decimal digits 0–9 as 00002–10012 Don’t care about binary numbers 10102–11112 9

Example: with don’t cares F(A,B,C,D) = m(1,3,5,7,9) + d(6,12,13) F = A'D + B'C'D without using don't cares F = A'D + C'D using don't cares A AB 00 01 11 10 CD Assign X == "1"  allows a 2-cube rather than a 1-cube 00 0 0 X 0 1 1 X 1 1 1 0 0 0 X 0 0 01 D 11 C 10 B 9

POS minimization using k-maps Using k-maps for POS minimization Encircle the zeros in the map Interpret indices complementary to SOP form 1 0 0 1 0 1 0 0 1 1 1 1 AB CD A B D 00 01 11 10 C F = (B’+C+D)(B+C+D’)(A’+B’+C) Same idea as the Truth Table 9

Design example: a two-bit comparator A B C D LT EQ GT 0 0 0 0 0 1 0 0 1 1 0 0 1 0 1 0 0 1 1 1 0 0 0 1 0 0 0 0 1 0 1 0 1 0 1 0 0 0 0 0 1 0 1 0 0 1 1 0 0 1 0 1 1 0 0 0 0 1 1 0 0 0 1 1 1 0 1 0 A B C D AB < CD AB = CD AB > CD LT EQ GT block diagram truth table Need a 4 -variable Karnaugh map for each of the 3 output functions 9

Design example: a two-bit comparator (con’t) K-map for LT K-map for EQ K-map for GT A A A AB AB AB 00 01 11 10 CD 00 01 11 10 CD 00 01 11 10 CD 00 0 0 0 0 1 0 0 0 1 1 0 1 1 1 0 0 00 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 1 00 0 1 1 1 0 0 1 1 0 0 0 0 0 0 1 0 01 01 01 D D D 11 11 11 C C C 10 10 10 B B B LT = A'B'D+A'C+B'CD GT = BC'D'+AC'+ABD' EQ = A'B'C'D'+A'BC'D+ABCD+AB'CD' = (A xnor C)•(B xnor D) 9

Design example: a two-bit comparator (con’t) Two ways to implement EQ: Option 1: EQ = A'B'C'D'+A'BC'D+ABCD+AB'CD‘ 5 gates but they require lots of inputs Option 2 EQ = (A xnor C) •(B xnor D) XNOR is constructed from 3 simple gates 7 gates but they all have 2 inputs each A B C D EQ 9

Design example: a two-bit comparator (con’t) Circuit schematics 9

Design example: BCD increment by 1 I8 I4 I2 I1 O8 O4 O2 O1 0 0 0 0 0 0 0 1 0 0 0 1 0 0 1 0 0 0 1 0 0 0 1 1 0 0 1 1 0 1 0 0 0 1 0 0 0 1 0 1 0 1 0 1 0 1 1 0 0 1 1 0 0 1 1 1 0 1 1 1 1 0 0 0 1 0 0 0 1 0 0 1 1 0 0 1 0 0 0 0 1 0 1 0 X X X X 1 0 1 1 X X X X 1 1 0 0 X X X X 1 1 0 1 X X X X 1 1 1 0 X X X X 1 1 1 1 X X X X I1 I2 I4 I8 O1 O2 O4 O8 block diagram truth table Need a 4 -variable Karnaugh map for each of the 4 output functions 9

Design example: BCD increment by 1 (con’t) 0 1 X X 0 0 X X 0 1 X 0 1 0 X X 0 1 X X O8 = I4I2I1 + I8I1‘ O4 = I4I2' + I4I1' + I4'I2I1 O2 = I8'I2'I1 + I2I1‘ O1 = I1' I1 I8 I2 I4 I1 I8 I2 I4 O2 O1 0 0 X 0 1 1 X 0 0 0 X X 1 1 X X 1 1 X 1 0 0 X 0 0 0 X X 1 1 X X We greatly simplify the logic by using the don’t cares 9

Design example: BCD increment by 1 (con’t) Draw the circuit schematic O8 = I4I2I1 + I8I1' O4 = I4I2' + I4I1' + I4'I2I1 O2 = I8'I2'I1 + I2I1' O1 = I1' 9

Design example: a two-bit multiplier A2 A1 B2 B1 P8 P4 P2 P1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 1 1 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 1 1 0 0 0 1 0 1 1 0 0 1 1 1 0 0 0 0 0 0 0 0 1 0 0 1 0 1 0 0 1 0 0 1 1 0 1 1 0 1 1 0 0 0 0 0 0 0 1 0 0 1 1 1 0 0 1 1 0 1 1 1 0 0 1 A1 A2 P1 P2 P4 P8 B1 B2 block diagram truth table Need a 4 -variable Karnaugh map for each of the 4 output functions 9

Two-bit multiplier (cont'd) 0 0 0 0 0 0 1 0 B1 A2A1 B2B1 A2 00 01 11 10 B2 A1 0 0 0 0 0 0 0 1 0 0 1 1 B1 A2A1 B2B1 A2 00 01 11 10 B2 A1 P4=A2B2B1' +A2A1'B2 P8=A2A1B2B1 0 0 0 0 0 0 1 1 0 1 0 1 0 1 1 0 B1 A2A1 B2B1 A2 00 01 11 10 B2 A1 0 0 0 0 0 1 1 0 B1 A2A1 B2B1 A2 00 01 11 10 B2 A1 P1=A1B1 P2=A2'A1B2 +A1B2B1' +A2B2'B1 +A2A1'B1