RTS: Kernel Design and Cyclic Executives

Slides:



Advertisements
Similar presentations
What is an Operating System?
Advertisements

Processes and Threads Chapter 3 and 4 Operating Systems: Internals and Design Principles, 6/E William Stallings Patricia Roy Manatee Community College,
Threads, SMP, and Microkernels
Chapter 3 Process Description and Control
Mutual Exclusion.
WHAT IS AN OPERATING SYSTEM? An interface between users and hardware - an environment "architecture ” Allows convenient usage; hides the tedious stuff.
Real-Time Kernels and Operating Systems Basic Issue - Purchase commercial “off-the- shelf” system or custom build one Basic Functions –Task scheduling.
© Copyright 2004 Dr. Phillip A. Laplante 1 Kernel Architectures  Polled Loop  Synchronized Polled Loop  State-Based Model  Cyclic Executives  Foreground/Background.
CENG 324 Embedded Computer Systems Lecture 3 General Concepts of RTOS (Real-Time Operating System) Asst. Prof. Tolga Ayav, Ph.D. Department of Computer.
RTOS Concepts and Defn From Pseudokernels to Operating Systems
Figure 2.8 Compiler phases Compiling. Figure 2.9 Object module Linking.
Page 1 Processes and Threads Chapter Processes 2.2 Threads 2.3 Interprocess communication 2.4 Classical IPC problems 2.5 Scheduling.
1: Operating Systems Overview
Realtime Systems Fundamnetals
Chapter 11 Operating Systems
© Copyright 2004 Dr. Phillip A. Laplante 1 Real-time operating systems: I  Operating systems taxonomy  Pseudo-kernels  Interrupt driven systems  Preemptive.
1 Chapter 13 Embedded Systems Embedded Systems Characteristics of Embedded Operating Systems.
1 Threads Chapter 4 Reading: 4.1,4.4, Process Characteristics l Unit of resource ownership - process is allocated: n a virtual address space to.
©Ian Sommerville 2004Software Engineering, 7th edition. Chapter 15 Slide 1 Real-time Systems 1.
Module 2 Clock-Driven Scheduling
LOGO OPERATING SYSTEM Dalia AL-Dabbagh
Operating System Review September 10, 2012Introduction to Computer Security ©2004 Matt Bishop Slide #1-1.
Segmentation & O/S Input/Output Chapter 4 & 5 Tuesday, April 3, 2007.
CHAPTER 4 10/29/ RTS: Kernel Design and Cyclic Executives CE321-fall2013.
I/O Computer Organization II 1 Interconnecting Components Need interconnections between – CPU, memory, I/O controllers Bus: shared communication channel.
Chapter 2 Processes and Threads Introduction 2.2 Processes A Process is the execution of a Program More specifically… – A process is a program.
Overview Task State Diagram Task Priority Idle Hook AND Co-Routines
6/1/ More on Cyclic Executives Simple loop cyclic executive Frame/slots Table-based predetermined schedule cyclic executive Periodic, aperiodic and.
1 Computer Systems II Introduction to Processes. 2 First Two Major Computer System Evolution Steps Led to the idea of multiprogramming (multiple concurrent.
Operating Systems: Internals and Design Principles
© Janice Regan, CMPT 300, May CMPT 300 Introduction to Operating Systems Operating Systems Processes and Threads.
Threads-Process Interaction. CONTENTS  Threads  Process interaction.
Cs431-cotter1 Processes and Threads Tanenbaum 2.1, 2.2 Crowley Chapters 3, 5 Stallings Chapter 3, 4 Silberschaz & Galvin 3, 4.
Slides created by: Professor Ian G. Harris Operating Systems  Allow the processor to perform several tasks at virtually the same time Ex. Web Controlled.
Unit 4: Processes, Threads & Deadlocks June 2012 Kaplan University 1.
Embedded Real-Time Systems Processing interrupts Lecturer Department University.
An operating system for a large-scale computer that is used by many people at once is a very complex system. It contains many millions of lines of instructions.
Advanced Operating Systems CS6025 Spring 2016 Processes and Threads (Chapter 2)
Real-Time Operating Systems RTOS For Embedded systems.
SE3910 Week 8, Class 3 Week 4 Lab: Please return your graded Lab 4 to me so I can enter it in my gradebook Week 9 Lab: Individual demos of working sub-modules.
Introduction to Operating Systems Concepts
Embedded System Scheduling
Processes and threads.
Real time systems RTS Engineering.
Session 3 Memory Management
RTS: Kernel Design and Cyclic Executives
OPERATING SYSTEMS CS3502 Fall 2017
Wayne Wolf Dept. of EE Princeton University
Chapter 2 Scheduling.
Real-time Software Design
Hardware Considerations
RTS: Kernel Design and Cyclic Executives
Structure of Processes
Implementation of Cyclic Executive
RTS: Kernel Design 11/30/2018.
RTS: Kernel Design and Cyclic Executives
RTS: Kernel Design 1/2/2019.
Process Description and Control
Threads Chapter 4.
Process Description and Control
Multiprocessor and Real-Time Scheduling
RTS: Kernel Design and Cyclic Executives
Process Control B.Ramamurthy 2/22/2019 B.Ramamurthy.
Process Description and Control
Chapter 13: I/O Systems I/O Hardware Application I/O Interface
Realtime Embedded System Design
Unix Process Control B.Ramamurthy 4/11/2019 B.Ramamurthy.
Cyclic executives for Bare Hardware
Chapter 2 Processes and Threads 2.1 Processes 2.2 Threads
Chapter 13: I/O Systems “The two main jobs of a computer are I/O and [CPU] processing. In many cases, the main job is I/O, and the [CPU] processing is.
Presentation transcript:

RTS: Kernel Design and Cyclic Executives Chapter 4 Amrita-UB-MSES-2013-6 5/11/2013

Kernel & Device drivers Servers (application ~, web ~, component ~) Shell XWin Thread lib ftp User applications System call interface Process, memory, file system, network managers. Kernel Device drivers Hardware/controller Devices Amrita-UB-MSES-2013-6 5/11/2013

Task characteristics of real workload Each task Ti is characterized by the following temporal parameters: Precedence constraints: specify any tasks need to precede other tasks. Release or arrival time: ri,j: jth instance of ith task Phase Φi: release time of first instant of ith task Response time: time between activation and completion Absolute deadline: instant by which task must complete Relative deadline: maximum allowable response time Period Pi: maximum length of intervals between the release times of consecutive tasks. Execution time: the maximum amount of time required to complete a instance of the task assuming all the resources are available. Amrita-UB-MSES-2013-6 5/11/2013

Simple kernels Polled loop: Say a kernel needs to process packets that are transferred into the DMA and a flag is set after transfer: for(;;) { if (packet_here) { process_data(); packet_here=0; } Excellent for handling high-speed data channels, a processor is dedicated to handling the data channel. Disadvantage: cannot handle bursts Amrita-UB-MSES-2013-6 5/11/2013

Simple kernels: cyclic executives Illusion of simultaneity by taking advantage of relatively short processes in a continuous loop: for(;;) { process_1(); process_2(); process_3(); … process_n(); } Different rate structures can be achieved by repeating tasks in the list: Amrita-UB-MSES-2013-6 5/11/2013

Cyclic Executives: Example: Interactive games Space invaders: for(;;) { check_for_keypressed(); move_aliens(); check_collision(); update_screen(); } check_keypressed() checks for three button pressings: move tank left or right and fire missiles. If the schedule is carefully constructed we could achieve a very efficient game program with a simple kernel as shown above. Amrita-UB-MSES-2013-6 5/11/2013

Finite state automata and Co-routine based kernels void process_a(void){ for(;;) { switch (state_a) { case 1: phase_a1(); | case 2: phase_a2(); | …. case n: phase_an();}}} void process_b(void){ switch (state_b) { case 1: phase_b1(); | case 2: phase_b2(); | case n: phase_bn();}}} state_a and state_b are state counters; Communication between coroutines thru’ global variables; Example: the famous CICS from IBM : Customer Information Control System IBM’s OS/2 uses this in Windows presentation management. Amrita-UB-MSES-2013-6 5/11/2013

Interrupt driven systems Main program is a simple loop. Various tasks in the system are schedules via software or hardware interrupts; Dispatching performed by interrupt handling routines. Hardware and software interrupts. Hardware: asynchronous Software: typically synchronous Executing process is suspended, state and context saved and control is transferred to ISR (interrupt service routine) Amrita-UB-MSES-2013-6 5/11/2013

Interrupt driven systems: code example void main() { init(); while(TRUE); } void int1(void){ save (context); task1(); retore (context);} restore (context);} Foreground/background systems is a variation of this where main does some useful task in the background; Amrita-UB-MSES-2013-6 5/11/2013

Process scheduling Scheduling is a very important function in a real-time operating system. Two types: pre-run-time and run-time Pre-run-time scheduling: create a feasible schedule offline to meet time constraints, guarantee execution order of processes, and prevents simultaneous accesses to shared resources. Run-time scheduling: allows events to interrupt processes, on demand allocation of resources , and used complex run-time mechanisms to meet time constraints. Amrita-UB-MSES-2013-6 5/11/2013

More on Cyclic Executives Simple loop cyclic executive Frame/slots Table-based predetermined schedule cyclic executive Periodic, aperiodic and interrupt-based task Lets design a cyclic-executive with multiple periodic tasks. 11 Amrita-UB-MSES-2013-6 5/11/2013

The basic systems Several functions are called in a prearranged sequence Some kind of cooperative scheduling You a have a set of tasks and a scheduler that schedules these tasks Types of tasks: base tasks (background), interrupt tasks, clock tasks Frame of slots, slots of cycles, each task taking a cycle, burn tasks to fill up the left over cycles in a frame. 12 Amrita-UB-MSES-2013-6 5/11/2013

Cyclic Executive Design 1 (pages 81-87) Base tasks, clock tasks, interrupt tasks Base: no strict requirements, background activity Clock: periodic with fixed runtime Interrupt: event-driven preemption, rapid response but little processing Design the slots Table-driven cyclic executive Amrita-UB-MSES-2013-6 5/11/2013

Cyclic executive Each task implemented as a function All tasks see global data and share them Cyclic executive for three priority level The execution sequence of tasks within a cyclic executive will NOT vary in any unpredictable manner (such as in a regular fully featured Operating Systems) Clock tasks, clock sched, base tasks, base sched, interrupt tasks Each clock slot executes, clock tasks, at the end a burn task that is usually the base task Study the figures in pages 83-86 of your text Amrita-UB-MSES-2013-6 5/11/2013

RT Cyclic Executive Program Lets examine the code: Identify the tasks Identify the cyclic schedule specified in the form of a table Observe how the functions are specified as table entry Understand the scheduler is built-in Learn how the function in the table are dispatched Amrita-UB-MSES-2013-6 5/11/2013

Implementation of a cyclic executive #include <stdio.h> #include <ctype.h> #include <unistd.h> #include <sys/times.h> #define SLOTX 4 #define CYCLEX 5 #define SLOT_T 5000 int tps,cycle=0,slot=0; clock_t now, then; struct tms n; void one() { printf("Task 1 running\n"); sleep(1); } void two() { printf("Task 2 running\n"); sleep(1); } Amrita-UB-MSES-2013-6 5/11/2013

Implementation (contd.) void three() { printf("Task 3 running\n"); sleep(1); } void four() { printf("Task 4 running\n"); void five() { printf("Task 5 running\n"); Amrita-UB-MSES-2013-6 5/11/2013

Implementation (contd.) void burn() { clock_t bstart = times(&n); while ((( now = times(&n)) - then) < SLOT_T * tps / 1000) { } printf (" brn time = %2.2dms\n\n", (times(&n)-bstart)*1000/tps); then = now; cycle = CYCLEX; } Amrita-UB-MSES-2013-6 5/11/2013

Implementation (contd.) void (*ttable[SLOTX][CYCLEX])() = { {one, two, burn, burn, burn}, {one, three, four, burn, burn}, {one, five, four, burn, burn}}; main() { tps = sysconf(_SC_CLK_TCK); printf("clock ticks/sec = %d\n\n", tps); then = times(&n); while (1) { for (slot=0; slot <SLOTX; slot++) for (cycle=0; cycle<CYCLEX; cycle++) (*ttable[slot][cycle])(); }} Amrita-UB-MSES-2013-6 5/11/2013

Summary The cyclic executive discussed the scheduler is built-in. You can also use clock ticks RTC etc to schedule the tasks In order use the cyclic executive discussed here in other applications simple change table configuration, and rewrite the dummy functions we used. Amrita-UB-MSES-2013-6 5/11/2013