EE 122: Lecture 7 Ion Stoica September 18, 2001.

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Presentation transcript:

EE 122: Lecture 7 Ion Stoica September 18, 2001

Routers A router consists Router implements two main functions . . A router consists A set of input interfaces at which packets arrive A se of output interfaces from which packets depart Router implements two main functions Forward packet to corresponding output interface Manage bandwidth and buffer space resources istoica@cs.berkeley.edu

Generic Router Architecture Input and output interfaces are connected through a backplane A backplane can be implemented by Shared memory low capacity routers (e.g., PC-based routers) Shared bus Medium capacity routers Point-to-point (switched) bus High capacity routers input interface output interface Inter- connection Medium (Backplane) istoica@cs.berkeley.edu

Speedup C – input/output link capacity RI – maximum rate at which an input interface can send data into backplane RO – maximum rate at which an output can read data from backplane B – maximum aggregate backplane transfer rate Back-plane speedup: B/C Input speedup: RI/C Output speedup: RO/C input interface output interface Inter- connection Medium (Backplane) C RI B RO C istoica@cs.berkeley.edu

Functional division Input interfaces: Output interfaces: Must perform packet forwarding – need to know to which output interface to send packets May enqueue packets and perform scheduling Output interfaces: input interface output interface Inter- connection Medium (Backplane) C RI B RO C istoica@cs.berkeley.edu

Three Router Architectures Output queued Input queued Combined Input-Output queued istoica@cs.berkeley.edu

Output Queued (OQ) Routers Only output interfaces store packets Advantages Easy to design algorithms: only one congestion point Disadvantages Requires an output speedup of N, where N is the number of interfaces  not feasible input interface output interface Backplane RO C istoica@cs.berkeley.edu

Input Queueing (IQ) Routers Only input interfaces store packets Advantages Easy to built Store packets at inputs if contention at outputs Relatively easy to design algorithms Only one congestion point, but not output… need to implement backpressure Disadvantages Hard to achieve utilization  1 (due to output contention, head-of-line blocking) However, theoretical and simulation results show that for realistic traffic an input/output speedup of 2 is enough to achieve utilizations close to 1 input interface output interface Backplane RO C istoica@cs.berkeley.edu

Combined Input-Output Queueing (CIOQ) Routers Both input and output interfaces store packets Advantages Easy to built Utilization 1 can be achieved with limited input/output speedup (<= 2) Disadvantages Harder to design algorithms Two congestion points Need to design flow control input interface output interface Backplane RO C istoica@cs.berkeley.edu

Generic Architecture of a High Speed Router Today Combined Input-Output Queued Architecture Input/output speedup <= 2 Input interface Perform packet forwarding (and classification) Output interface Perform packet (classification and) scheduling Backplane Point-to-point (switched) bus; speedup N Schedule packet transfer from input to output istoica@cs.berkeley.edu

Backplane Point-to-point switch allows to simultaneously transfer a packet between any two disjoint pairs of input-output interfaces Goal: come-up with a schedule that Provide Quality of Service Maximize router throughput Challenges: Address head-of-line blocking at inputs (see next slide) Resolve input/output speedups contention Avoid packet dropping at output if possible Note: packets are fragmented in fix sized cells at inputs and reassembled at outputs istoica@cs.berkeley.edu

Head-of-line Blocking The cell at the head of an input queue cannot be transferred, thus blocking the following cells Cannot be transferred because is blocked by red cell Input 1 Output 1 Cannot be transferred because output buffer overflow Input 2 Output 2 Input 3 Output 3 istoica@cs.berkeley.edu

Solution to Avoid Head-of-line Blocking Maintain at each input N virtual queues, i.e., one per output Input 1 Output 1 Output 2 Input 2 Output 3 Input 3 istoica@cs.berkeley.edu

Typical Functions Performed by Input Interface on Data Path Packet forwarding: decide to which output interface to forward each packet based on the information in packet header istoica@cs.berkeley.edu

Datagram (Connectionless) Forwarding Each IP router maintains a routing table A routing entry: (address prefix, output port) Upon packet arrival input port forwards the packet to the output port whose address prefix matches packet’s destination address in the most number of bits (longest prefix matching) 128.16.120.xxx 1 12.82.xxx.xxx 2 … … 12.82.100.101 1 128.16.120.111 2 istoica@cs.berkeley.edu

Datagram Forwarding (cont’d) Each packet is forwarded independently of previous packets Packets between two hosts can follow different paths Link and router failure may be transparent for end-hosts In case of failure a new alternative route is usually found No service guarantees When a source sends a packet, it does not have precise information about the available resources along the path istoica@cs.berkeley.edu

Virtual Circuit (VC) Forwarding Each router maintains a routing table A routing entry: (input port, input VCI, output port, output VCI); VCI – Virtual Circuit Identifier Each packet carries a VCI in its header Upon a packet arrival at interface i Input port uses i and the packet’s VCI v to find the routing entry (i, v, i’, v’) Replaces v with v’ in the packet header Forwards packet to output port I’ istoica@cs.berkeley.edu

VC Forwarding: Example in-VCI out out-VCI … … … … in in-VCI out out-VCI 1 7 4 1 … … … … … … … … destination source 3 5 4 11 … … … … 1 1 2 2 1 1 1 3 3 2 2 4 4 3 3 11 5 4 4 1 1 7 2 2 3 3 4 4 in in-VCI out out-VCI … … … … 2 11 3 7 … … … … istoica@cs.berkeley.edu

VC Forwarding (cont’d) A signaling protocol is required to set up the state for each VC in the routing table A source needs to wait for one RTT (round trip time) before sending the first data packet Can provide per-VC QoS When we set the VC, we can also allocate bandwidth and buffer resources along the path If a link or router fails, the connection is broken and a new connection needs to be established istoica@cs.berkeley.edu

Source Routing Each packet specifies the sequence of routers, or alternatively the sequence of output ports, from source to destination source 1 1 2 2 1 1 3 3 2 2 4 4 3 3 4 3 4 4 4 1 1 2 2 4 3 4 3 3 4 3 4 4 4 istoica@cs.berkeley.edu

Source Routing (cont’d) Give the source control of the path Doesn’t require the source to wait for an RTT before sending the first packet Not scalable Packet overhead proportional to the number of routers Typically, require variable header length which is harder to implement Hard for source to have complete information IP implements lose source routing  sender specifies only a subset of routers along the path istoica@cs.berkeley.edu

Typical Functions Performed by Output Interface Buffer management: decide when and which packet to drop Scheduler: decide when and which packet to transmit Buffer Scheduler 1 2 istoica@cs.berkeley.edu

Typical Functions Performed by Output Interface (cont’d) Packet classification: map each packet to a predefined flow/connection (for datagram forwarding) use to implement more sophisticated services (e.g., QoS) Flow: a subset of packets between any two endpoints in the network flow 1 Classifier flow 2 Scheduler 1 2 flow n Buffer management istoica@cs.berkeley.edu

Summary Routing architecture Router functionalities Input and output ports interconnected by a high-speed fabric Goals: high utilization  solve input and output contentions Router functionalities Packet forwarding Datagram Virtual circuit Source routing Manage router resources Packet classification Buffer management istoica@cs.berkeley.edu