INSTRUCTION SET.

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Presentation transcript:

INSTRUCTION SET

Special Function Registers W, the working register. To move values from one register to another register, the value must pass through the W register. FSR (04h,84h,104h,184h), File Select Register Indirect data memory addressing pointer INDF (00h,80h,100h,180h)  accessing INDF accesses the location pointed by IRP+FSR PC, the Program Counter, PCL (02h, 82h, 102h, 182h) and PCLATH (0Ah, 8Ah, 10Ah, 18Ah)

Instruction Formats

INSTRUCTION 1

INSTRUCTION 2

INSTRUCTION 3

INSTRUCTION 4

INSTRUCTION 5

INSTRUCTION 6

INSTRUCTION 7

INSTRUCTION 8

INSTRUCTION 9

INSTRUCTION 10

INSTRUCTION 11

INSTRUCTION 12

INSTRUCTION 13

INSTRUCTION 14

INSTRUCTION 15

INSTRUCTION 16

INSTRUCTION 17

INSTRUCTION 18

INSTRUCTION 19

INSTRUCTION 20

INSTRUCTION 21

INSTRUCTION 22

INSTRUCTION 23

INSTRUCTION 24

INSTRUCTION 25

INSTRUCTION 26

INSTRUCTION 27

INSTRUCTION 28

INSTRUCTION 29

INSTRUCTION 30

INSTRUCTION 31

INSTRUCTION 32

INSTRUCTIONS 33-35 SLEEP CLRWDT NOP

Direct/Indirect Addressing

Direct Addressing Use only 7 bits of instruction to identify a register file address. The other two bits of register address come from RP0 and RP1 bits in the STATUS register Example: Bank switching (Note: case of 4 banks) CLRF STATUS ; Clear STATUS register (Bank0) : ; BSF STATUS, RP0 ; Bank1 BCF STATUS, RP0 ; Bank0 MOVLW 0x60 ; Set RP0 and RP1 in STATUS register, other XORWF STATUS, F ; bits unchanged (Bank3) BCF STATUS, RP0 ; Bank2 BCF STATUS, RP1 ; Bank0

Indirect Addressing The INDF register is not a physical register. Addressing the INDF register will cause indirect addressing. Any instruction using the INDF register actually access the register pointed to by the File Select Register (FSR). The effective 9-bit address is obtained by concatenating the 8-bit FSR register and the IRP bit in STATUS register. Example MOVLW 0x20 ;initialize pointer MOVWF FSR ;to RAM NEXT: CLRF INDF ;clear INDF register INCF FSR,F ;inc pointer BTFSS FSR,4 ;all done? (to 0x2F) GOTO NEXT ;no clear next CONTINUE: ;yes continue

I/O Ports General I/O pins are the simplest of peripherals used to monitor and control other devices. For most ports, the I/O pin’s direction (input or output) is controlled by the data direction register TRISx (x=A,B,C,D,E). A ‘1’ in the TRIS bit corresponds to that pin being an input, while a ‘0’ corresponds to that pin being an output The PORTx register is the latch for the data to be output. Reading PORTx register read the status of the pins, whereas writing to it will write to the port latch.

Example: Initializing PORTD bcf STATUS, RP0 ; bank0 bcf STATUS, RP1 clrf PORTD ; initializing PORTD by clearing output data latches bsf STATUS, RP0 ; select bank1 movlw 0xCF ; value used to initialize data direction (1100 1111) movwf TRISD ; PORTD<7:6>=inputs, ;PORTD<5:4>=outputs, PORTD<3:0>=inputs