A Fully Physical Model for Leakage Distribution under Process Variations in Nanoscale Double-Gate CMOS Liu Cao Lin Li
Outline Introduction Nanoscale Double-Gate Background Double-Gate Leakage Model Leakage Distribution Multiple-Device Stacks
Introduction Multi-gate technologies are the forerunners to replace bulk CMOS.
Why multi-gate is better? Thicker gate insulator Superior short channel characteristics Improved mobility in the undoped body Elimination of random dopant effects
Double-Gate vs Bulk
Process Variation in Circuit Design
Which model should we use? Compact SPICE-like models [3, 2]? Analytical Model: Semi-physical Vth [11, 4, 5]? Physical and Analytical Model: This paper.
Contribution of this paper Derive a fully physical model for double-gate leakage Develop a model for single device leakage distribution due to gate length and body thickness variations Extend the model to multiple-device stacks
Outline Introduction Nanoscale Double-Gate Background Double-Gate Leakage Model Leakage Distribution Multiple-Device Stacks
Ideal Double-Gate MOSFET Structure
Physical Model of this paper In this paper, only symmetric tox , VGS and ∆ΦMS model is considered
Short Channel Effect (SCE) The 2-D potential distribution is derived as a solution of Poisson’s equation [9].
Quantum Confinement Effect (QCE) QCE leads to quantization of energy levels, and finite probability of occupation of these levels Both the wave functions and quantized energy levels are solutions of the 1-D Schrodinger’s equation.
Process Variations tox and ∆ΦMS are maintained the nominal values. L and t have variations.
Outline Introduction Nanoscale Double-Gate Background Double-Gate Leakage Model Leakage Distribution Multiple-Device Stacks
Subthreshold Diffusion Current In which nc (x, y) represents the effective carrier concentration:
SCE – Electrostatic potential a [9] Poisson’s Equation: With the boundary conditions
Derivation for a Using superposition, the electrostatic potential in DG can be written as: Where vxx is the 1-D solution to equation Sssssssssssss are the solutions to satisfy the top and bottom boundary conditions
Dielectric Boundary Conditions Take ratios of these equations and get the Eigen Value Equation
Fully potential expression in Subthreshld region
Derivation for Subthreshold current The current density can be written as: Integrating in x and z directions gives: Where Is the inversion charge per gate area.
Final Subthreshold current [9] Current continuity requires Ids be independent of y.
QCE – intrinsic carrier concentration [13] It is calculated from the density of states, and the probability of occupation based on the 1-D wavefunction solution.
Compact Solution for Leakage Current KEY: Isub can be captured by accounting for the potential at the center of the ultra-thin body (x=0), and at the top of the source-drain barrier (y=ytop).
Verification for the Analytical Model Worst case (WC) means highest leakage Best case (BC) means lowest leakage
Outline Introduction Nanoscale Double-Gate Background Double-Gate Leakage Model Leakage Distribution Multiple-Device Stacks
Leakage distribution Expand as 2-D Taylor series
Leakage distribution(cont.) is the i-th partial derivative of with respect to L
Leakage distribution(cont.) Thus, we have: where and The expectation of this random variable can be calculated as:
Leakage distribution(cont.) kth central moment of a real-valued random variable X is the quantity μk := E[(X − E[X])k], where E is the expectation operator. For a continuous univariate probability distribution with probability density function f(x) the moment about the mean μ is
Leakage distribution(cont.) Assuming independent distribution, if L and tsi are distributed normally, then their central moments can be evaluated as: the variance of
Leakage distribution(cont.)
1.4
Outline Introduction Nanoscale Double-Gate Background Double-Gate Leakage Model Leakage Distribution Multiple-Device Stacks
Multiple-Device Stacks 1
Multiple-Device Stacks(cont.) Expand as 3-D Taylor Series
Multiple-Device Stacks(cont.)
Multiple-Device Stacks(cont.)
Reference [7] Q. Chen, E. M. Harrell, and J. D. Meindl. A physical short- channel threshold voltage model for undoped symmetric double- gate MOSFETs. IEEE Trans.Electron Devices, 50(7):1631–1637, Jul 2003. [9] X. Liang and Y. Taur. A 2-D analytical solution for SCEs in DG MOSFETs. IEEE Trans. Electron Devices, 51(8):1385–1391, Aug 2004. [11] R. Rao, A. Srivastava, D. Blaauw, and D. Sylvester. Statistical analysis of subthreshold leakage current for VLSI circuits. IEEE Trans. VLSI, 12(2):131–139, Feb 2004. [13] V. P. Trivedi and J. G. Fossum. Quantum-mechanical effects on the threshold voltage of undoped double-gate MOSFETs. IEEE Electron Device Lett., 26(8):579–582, Aug 2005. [14] S. Xiong and J. Bokor. Sensitivity of double-gate and FinFET devices to process variations. IEEE Trans. Electron Devices, 50(11):2255–2261, Nov 2003.