Designing PCBs Within the Context of a System

Slides:



Advertisements
Similar presentations
Software Modeling SWE5441 Lecture 3 Eng. Mohammed Timraz
Advertisements

The Design Process Outline Goal Reading Design Domain Design Flow
Building a Typical Electronic Project in Senior Design Peter Wihl (former Guest Lecturer)
LSU 06/04/2007Electronics 81 CAD Tools for Circuit Design Electronics Unit – Lecture 8 Schematic Diagram Drawing Etched Circuit Board Layout Circuit Simulation.
CASE Tools And Their Effect On Software Quality Peter Geddis – pxg07u.
An Introduction to Software Architecture
CAD for Physical Design of VLSI Circuits
MAPLDDesign Integrity Concepts You Mean We’re Still Working On It? Sustaining a Design.
Autodesk Inventor ® Professional Design, Validate and Document the Complete Machine Autodesk Inventor ® Professional Introduction.
Lessons Learned The Hard Way: FPGA  PCB Integration Challenges Dave Brady & Bruce Riggins.
CAM-I Scalable Flexible Manufacturing Initiative NGMS Task 6.1.
© 2012 xtUML.org Bill Chown – Mentor Graphics Model Driven Engineering.
© 2009 Rockwell Collins, Inc. All rights reserved. From Paper Based Analysis to Model Based Analysis: Applications of AP 210 at Rockwell Collins April.
Architecture View Models A model is a complete, simplified description of a system from a particular perspective or viewpoint. There is no single view.
CSE 303 – Software Design and Architecture
Analysis Yaodong Bi. Introduction to Analysis Purposes of Analysis – Resolve issues related to interference, concurrency, and conflicts among use cases.
Upgrade PO M. Tyndel, MIWG Review plans p1 Nov 1 st, CERN Module integration Review – Decision process  Information will be gathered for each concept.
© 2012 Cengage Learning. All Rights Reserved. This edition is intended for use outside of the U.S. only, with content that may be different from the U.S.
Logical Architecture and UML Package Diagrams. The logical architecture is the large-scale organization of the software classes into packages, subsystems,
© 2013 © 2016 Aras aras.com.
The New Generation of CAD Tools
Chapter 2 Object-Oriented Paradigm Overview
IBM Rational Rhapsody Advanced Systems Training v7.5
Elaboration popo.
Analysis Classes Unit 5.
ASIC Design Methodology
Mastering Autodesk Revit MEP 2016 CHAPTER 9: Creating Logical Systems
Chapter 6 The Traditional Approach to Requirements.
An Unobtrusive Debugging Methodology for Actel AX and RTAX-S FPGAs
Object-Oriented Analysis and Design
EEE2135 Digital Logic Design Chapter 1. Introduction
What is UML? What is UP? [Arlow and Neustadt, 2005] October 5, 2017
OVERVIEW Impact of Modelling and simulation in Mechatronics system
Unified Modeling Language
Complexity Time: 2 Hours.
THE PROCESS OF EMBEDDED SYSTEM DEVELOPMENT
Software Quality Engineering
Recall The Team Skills Analyzing the Problem (with 5 steps)
CIS 375 Bruce R. Maxim UM-Dearborn
Information Systems in Organizations 2
Rational Unified Process
Subject Name: Embedded system Design Subject Code: 10EC74
Ch 15 –part 3 -design evaluation
Chapter 5 Designing the Architecture Shari L. Pfleeger Joanne M. Atlee
Fabrication Manager Features
Component-Based Software Engineering
GROUP MEMBERS NAME ROLL NO SHAUBAN ALI 17-ARID-5650 UMAIR MUSHTAQ 17-ARID-5656 TARIQ SAEED 17-ARID-5657 MUSKAN WADOOD 17-ARID-5641.
Overview Why VLSI? Moore’s Law. Why FPGAs?
Object-Oriented Design
Object oriented analysis and design
Starting Design: Logical Architecture and UML Package Diagrams
Verification Plan & Levels of Verification
An Introduction to Software Architecture
HIGH LEVEL SYNTHESIS.
For University Use Only
Allegro ECAD-MCAD Co-design using EDMD (IDX) Format
Automated Analysis and Code Generation for Domain-Specific Models
Working Drawings Chapter 12.
Design Yaodong Bi.
Stumpf and Teague Object-Oriented Systems Analysis and Design with UML
Use Case Analysis – continued
Information Hidding Dr. Veton Kepuska.
Design.
Detailed Design Review: P18001
Stumpf and Teague Object-Oriented Systems Analysis and Design with UML
Software Re-engineering and Reverse Engineering
UML  UML stands for Unified Modeling Language. It is a standard which is mainly used for creating object- oriented, meaningful documentation models for.
From Use Cases to Implementation
Chapter 13 Logical Architecture.
Overview Why VLSI? Moore’s Law. Why FPGAs?
Presentation transcript:

Designing PCBs Within the Context of a System Michael Alexander Michaela@cadence.com

What Is a System? System on a chip (SoC) System in a package (SiP) Backplane Silicon Board System on a chip (SoC) System in a package (SiP) One or more SoCs PCB system that has ASICs / FPGAs Mixed analog / digital / RF Multiple interconnected boards Rigid-Flex / rigid Background – definition is many things to many people

What Is a System? Wikipedia defines a system as “A set of interacting or interdependent component parts forming a complex / intricate whole” A system has structure: it contains parts (or components) that are directly or indirectly related to each other A system has behavior: it exhibits processes that fulfill its function or purpose A system has interconnectivity: the parts and processes are connected by structural and / or behavioral relationships Structure and behavior may be decomposed via subsystems and sub-processes to elementary parts and process steps A system has behavior that, in relativity to its surroundings, may be categorized as both fast and strong Surroundings System Boundary Here’s a better view …. Also introduces the possibility of ‘sub-systems’

Scope Multi-board PCB system design Architectural definition Boards that are connected, integrated, and encapsulated within an enclosure Interconnection mechanisms Motherboard / daughtercard Connectors Cables Ribbon cable Rigid-Flex Optics This is often described in many ways and can cover multiple ‘fabrics’

System-Level Design Definition to implementation Focus on this Area System Engineering V – the classic design process approach

Architectural Definition Process Overview Let’s start at the ‘top’

Architectural Definition Tasks Capture system structure Functional blocks Relationship between functions Interface details System architecture Determine subsystems, based on tradeoff decisions, for example: Power supply and distribution Clock diagram Memory implementation – onboard vs shared System partitioning Optimization driven across size, performance, power, interconnects, etc. System-level timing – budgeted constraints across the system Isolating mixed technologies – Digital, RF, analog High level of abstraction move from idea to reality Vision to object

Architectural Definition System design and development Tradeoff Analysis Early tradeoff analysis enables optimization: Cost, performance, reliability, form factor, and others Time Abstraction Idea Architectural Definition Logical Detailed Physical Release to Manufacture Prototype / Pre-Production Production Collaboration Management Throughout development, key decisions need to be made. The earlier the better! Reuse

Architectural Definition Tradeoffs Architecture Ability to partition into multiple PCB’s Analyze the impacts of partitioning: Cost, power, functional, size, etc. Correct-by-construction system connectivity Physical implementation Link several boards that make up a system Define interconnecting components (connectors, flex, cables) Validate connectivity Manage interconnectivity Re-target or re-partition as necessary Retain integrity with logical design Validate system-level constraints Manage physical rules, clearance, signal integrity, power delivery, and environmental needs Tool flow integration Schematics, FPGAs, cables/harnesses Support multiple fabrics from silicon to wire These decisions may involve trading items – performance, cost, power etc.

Architectural Definition System design elements Is performance to specification? Is architecture optimized? Partitioning Analysis Cabling MCAD Thermal Data Management MFG Key PerformanceIndicators SYSTEM DESIGN Are signals transported efficiently? Is design efficient and conforming to standards? Will it fit? BOM and design data up to date? The trade-offs are also linked to the needs of the whole process ….. Here are a few examples Are yields acceptable? Thermal effects on performance?

Architectural Definition Partition, analyze… implement? Collaboration and Management Analysis Team-Based Logical Design High-Level Architecture PCB-1 FPGA1 PCB-2 FPGA2 Partitioning Team-Based PCB Design PCB Design System Integration System Integration and Analysis System Design Re-Partitioning From Scheme to implementation, designer involvement increases – Electrical Engineers, SI / PI Engineers, MCAD Designers, PCB Designers

Architectural Definition Typical flow: Functional blocks Block representations of main system functions added to architectural design Each block can be: Single function Group of functions Purely graphical Represent peripheral objects such as keyboards, monitors, disk drives, etc Here’s an example of moving from high-level to detail, at the front-end process.

Architectural Definition Typical flow: Block relationships Graphics added to represent relationships Graphical images to visually indicate: Functional relationships Local interconnectivity As with PCB’s – grouping takes place. Relationships are defined, local interconnectivity considered

Architectural Definition Typical flow: Interconnectivity intent System-level interconnectivity Graphical representation of: Interconnectivity between blocks Guidelines and advisories can be added Connectivity width can be implied Needs can be defined as notes or properties to guide informed decisions throughout the flow

Architectural Definition Typical flow: Power management ® System power delivery needs are listed at top level of architecture System Power Supplies and Grounding needs defined System power supplies and grounding needs defined Power assignment may also influence grouping and division decisions

Architectural Definition Typical flow: Subsystem definition Identify subsystems Subsystems displayed Connectors required across subsystems Multiple blocks assigned to single subsystem First pass at determining sub-systems – ‘what is located where’

Architectural Definition Typical flow: Protocols and interfaces System Interface connection – automatic or manual assignment System interface connection – automatic or manual assignment Interfaces can be physical: Cable Flex Board connectors PCB traces Interfaces can be industry standard or user defined Connectivity reuse – protocols that characterize interfaces can be referenced, such as DDR4, PCI-e, SATA etc. Connectivity reuse.

Architectural Definition Typical flow: Reuse design data Logical Architectural Definition Typical flow: Reuse design data Reuse block or design instantiated at system level Physical Physical reuse – if a block exists and it works, why not reuse it. Murphy’s Law may kick in – logic works but layout doesn’t ….. So how do I solve this? Push into block for logical and/or physical view

Detailed Definition Floorplanning Floor Planning enables physical needs to be explored and evaluated ….. Multiple boards in a multi-board system.

Detailed Definition Floorplanning: Early-stage PCB implementation Physical implementation “discovery” can include: Function to physical Component types Component associations Physical to function Re-used layouts Logical inheritance Will it fit? Single board or multi-board? Re-partitioning needed System space exploration Explore connectivity schemes Determine system-level constraints Assign constraint budgets to each board Should physical layout always start with a net list?

Detailed Definition Floorplanning: Single or multiple boards Placement created from list of parts Reuse blocks “Scratch pad” placement Library-driven No logical information in place Place from physical library Footprints Connectors / mating connectors Reuse blocks Temporary symbol support Place from parts list Connector selected, mate connector added Should physical layout always start with a net list? Temporary components

Detailed Definition Floorplanning: Physical to logical mapping Library-driven placement updated from schematic (cross-probe) Select on schematic, pick on layout Check legal matching of schematic symbol to PCB footprint From scratchpad to layout – reversed engineering 2. Pick on layout 1. Select on schematic 4. Reference designator assigned, connectivity established 3. Compatibility checked

Detailed Definition Floorplanning: Multiple boards User-defined outlines MCAD imported outlines “Smart” outlines Aspect ratio Edge clearance Multiple board outlines Export placement for each board Outlines known – import and use Outlines flexible - draw your own or ‘rubberband’

Detailed Definition Floorplanning: Connectors Connector alignment checking Connector compatibility 2D / 3D views Connector assignment and mating – library driven / suggested

Detailed Definition Floorplanning: Will it fit? Implementation guidelines Floorplanned scheme Actual assembly Assemble, check, adjust, repeat - Multiple boards with flexible height restricted areas Conceptual Idea Physical Implementation

Detailed Definition Floorplanning: System space exploration System exploration Signal integrity and power delivery tradeoffs across the system Develop and explore “the four Cs” Implementation fabrics across the system Copper Connectors Components Cables (Harnesses) Understand and control Tolerances – minimum, maximum, mismatches Budgeting constraints across system Frequency and time domain analysis Performance is king – two boards with no apparent SI / PI issues fail when joined at the system-level

Detailed Definition Floor planning: Tradeoff analysis decisions Performance vs connection mechanisms Cable length too long Signal loss through connector unacceptable Component / signal coupling across boards Folded flex – Self-coupling, EMI / EMC Thermal stress on components On-board, across-board coupling Inter-board collisions Components on two different boards too close in 3D space Board to enclosure Board to board What I want? … What I get? What goes in may not match what comes out – it’s the loop I mentioned at the start of the session

Detailed Definition Floorplanning: Reuse Subsystem can be: Existing logic, existing layout or both Existing subset of a board – e.g., memory subsystem Specialized circuit – power supplies, RF circuits, etc. Reusing subsystems within system design Qualified, known subsystem Saves time, reduces risk Enables tradeoff analysis earlier in the design process Reuse rather than rebuild ….. Well defined at the board level …. Need to elevate to system

Detailed Definition Floorplanning: Productivity aids Alignment marks Accurate placement Guided alignment Area calculation (head-up display) Placement may not be a PCB Designer specific activity going forward – so aids are needed How much space don’t I have Area Used Total Area Subsystem 13.50 14.96 System 21.67 30.36

Detailed Definition System validation Generate connection reports across multiple boards Manage interconnectivity at system level Collision detection System BOM Others… Bring it all together – construct, analyze, confirm, release

Detailed Definition Floorplanning: Intelligent system diagram Interconnection management Interconnection validation during implementation process Architectural to detailed Implementation changes from original specification For example: DDR3 replaced with DDR4 Keeping system design diagram in-sync with the implementation is important Support top-down and bottom-up approaches Focus on this area Front 2 back just got bigger! Close the loop: Maintain system integrity throughout development

Roadmap Items Related to Capture/Moog Import Capture Flat designs with data (5 XXX) Qir7 Support for External References in case of hierarchical designs Features Planned for Q4, 2018 Export as Capture Design (Evaluation XXX,XXX) OEM / ODM collaboration System Capture working of Capture libraries (XXX) Native support for existing Capture Library settings Part Browser support for Capture Libraries and CIS DB Import Capture (XXX) Support for Variants(Evaluation) Features planned for SPB 17.4 release System Level Design Multiple board Floor Planning (XXX, XXX) Component re-assignment across boards System Netlist Auto Mapping of connectivity in Detailed Design (XXX, XXX)