Parallel Processing with PlayStation3 Lawrence Kalisz

Topics Cell Processor 1.History 2.Architecture Parallel Programming 1.Install Linux 2.Examples PS3 Cluster 1.Applications 2.Examples

PS3 Cell Processor: History Created by Sony, Toshiba, and IBM (STI) 400 Engineers ½ Billion Dollars

PS3 Cell Processor: Architecture

Power Processing Element (PPE) Synergistic Processing Element (SPE) Element Interconnection Bus (EIB) Memory System Network Card & Graphics Card

Power Processor Element PPE handles operating system and control tasks 64-bit Power Architecture with VMX In-order, 2-way hardware simultaneous multi-threading (SMT) 32KB L1 cache (I & D) and 512KB L2

Synergistic Processing Element Specialized high performance core Three main components 1.SPU: Supplemental Processing Units 2.LS: local store memory 3. MFC: memory flow control manages data in and out of SPE Can only access (load & store) data in the SPE local store 7 SPEs used for rendering, 1 SPE reserved for image compression

SPE: Data IN and OUT Steps SPU needs data 1. SPU initiates MFC request for data 2. MFC requests data from memory 3. Data is copied to local store 4. SPU can access data from local store SPU operates on data then copies data from local store back to memory in a similar process

SPE: Data IN and OUT Steps

Element Interconnect Bus Physically overlaps all processor elements Central arbiter supports up to 3 concurrent transfers per ring 2 stage, dual round robin arbiter Each port supports concurrent 16B in and 16B out data path Ring topology is transparent to element data interface Each EIB Bus data port supports 25.6GBytes/sec each way

PS3 Cell: Parallel Programming

Current working Linux distros: 1.Fedora Core 5 2.YellowDog Gentoo PowerPC 64 edition 4.Debian OpenMPI (for use with cluster) IBMs CELL SDK

PS3 Cell: Parallel Programming Cell performance ~10x better than GPU for media and other applications that can take advantage of its SIMD capability PPE performance is comparable to a traditional GPU performance SPE performance mostly the same as, or better than, a GPU with SIMD Performance scales with number of SPEs

PS3 Cell: Parallel Programming Programming becomes exercise in partitioning, mapping (layout),routing (communication) and scheduling

PS3 Cell: Parallel Programming AI Backgammon player

PS3 Cell: Parallel Programming AI Backgammon player 1M board evaluations in ~3 seconds (6 SPEs) Data parallel implementation, linear speedup

PS3 Cell: Parallel Programming SPU programs are designed and written to work together but are compiled independently Separate compiler and toolchain (ppu-gcc and spu-gcc) Produces small ELF image for each program that can be embedded in PPU program

PS3 Cell: Parallel Programming BLUE-STEEL

PS3 Cell: Parallel Programming BLUE-STEEL Full ray tracer running on each SPE Data parallel implementation :// eature=player_detailpage :// eature=player_detailpage

PS3 Cell: Parallel Programming BLUE-STEEL A Solution to the rendering equation Triangle Rasterization – Fast – possible in real time on a single core – Inaccurate or tedious for global effects such as shadows, reflection, refraction, or global illumination Ray Tracing – Slow – unless done on multiple cores – Accurate and natural shadows, reflection, and refraction

PS3 Cell: Parallel Programming BLUE-STEEL Build a fast ray tracer from the ground up to take advantage of multiple cores. – 6 accessible cores for rendering

PS3 Cell: Parallel Programming Ray Tracing Shoot a ray through each pixel on the screen Check for intersections with each object in the scene Keep the closest intersection

PS3 Cell: Parallel Programming Ray Tracing Shade each point according to the material of the object, as well as the lights in the scene Cast rays for shadows, reflection, and refraction

PS3 Cell: Parallel Programming BLUE-STEEL

PS3: Cluster Applications Air Force PS3 Gravity Grid LACAL Student Cluster

References PS3-cell-tutorial.pdf PS3-cell-tutorial.pdf mS7XPiI mS7XPiI _cluster _cluster garra/PAPERS/scop3.pdf garra/PAPERS/scop3.pdf

Any Questions ?