Suppose that a certain program takes 200 seconds of elapsed time to execute. Out of these 200 seconds, 180 seconds is the CPU time and the rest is I/O.

Slides:



Advertisements
Similar presentations
Computing Systems Organization
Advertisements

Digital Computer Fundamentals
Avishai Wool lecture Introduction to Systems Programming Lecture 8 Input-Output.
LOGO BUS SYSTEM Members: Bui Thi Diep Nguyen Thi Ngoc Mai Vu Thi Thuy Class: 1c06.
CHAPTER 3 TOP LEVEL VIEW OF COMPUTER FUNCTION AND INTERCONNECTION
CS 342 – Operating Systems Spring 2003 © Ibrahim Korpeoglu Bilkent University1 Input/Output CS 342 – Operating Systems Ibrahim Korpeoglu Bilkent University.
EEE440 Computer Architecture
Computer System Internal components - The processor - Main memory - I / O controllers - Buses External components (peripherals). These include: - keyboard.
Input-Output Organization
ECEG-3202 Computer Architecture and Organization Chapter 3 Top Level View of Computer Function and Interconnection.
Computer Architecture Lecture 24 Fasih ur Rehman.
Computer Organization Instruction Set Architecture (ISA) Instruction Set Architecture (ISA), or simply Architecture, of a computer is the.
I/O Interface. INTRO TO I/O INTERFACE I/O instructions (IN, INS, OUT, and OUTS) are explained. Also isolated (direct or I/O mapped I/O) and memory-mapped.
Chapter 3 System Buses.  Hardwired systems are inflexible  General purpose hardware can do different tasks, given correct control signals  Instead.
3/19/  Differentiate the class of memory  List the type of main memory  Explain memory architecture and operation  Draw memory map  Design.
1 load [2], [9] Transfer contents of memory location 9 to memory location 2. Illegal instruction.
Computer Organization and Design
Lecture 2. A Computer System for Labs
DIRECT MEMORY ACCESS and Computer Buses
Serial Communications
Systems Architecture Keywords Fetch Execute Cycle
Architectures of Digital Information Systems Part 1: Interrupts and DMA dr.ir. A.C. Verschueren Eindhoven University of Technology Section of Digital.
Bus Systems ISA PCI AGP.
I/O SYSTEMS MANAGEMENT Krishna Kumar Ahirwar ( )
The 8085 Microprocessor Architecture
ES C263 Microprocessor Programming and Interfacing
Sistem Mikroprosesor 1. Blok Diagram Minimum System(CPU,ROM,RAM)
Control Unit Lecture 6.
UNIT 9 Computer architecture
Computing Systems Organization
Operating Systems (CS 340 D)
The deadline establish a priority among interrupt requests.
Chapter 7.2 Computer Architecture
Memory Systems 7/21/2018.
The 8085 Microprocessor Architecture
Computer Architecture
1 Input-Output Organization Computer Organization Computer Architectures Lab Peripheral Devices Input-Output Interface Asynchronous Data Transfer Modes.
CS 286 Computer Organization and Architecture
Chapter 3 Top Level View of Computer Function and Interconnection
COMP2121: Microprocessors and Interfacing
CS703 - Advanced Operating Systems
Microcomputer Architecture
Computer Organization & Assembly language
An Introduction to Microprocessor Architecture using intel 8085 as a classic processor
Computer Architecture
Interfacing Memory Interfacing.
CSCI 315 Operating Systems Design
Number Representations and Basic Processor Architecture
ECEG-3202 Computer Architecture and Organization
Operating Systems Chapter 5: Input/Output Management
Today’s agenda Hardware architecture and runtime system
BLOCK DIAGRAM OF AN ADDRESS
I/O BUSES.
Md. Mojahidul Islam Lecturer Dept. of Computer Science & Engineering
Overview of Computer Architecture and Organization
Md. Mojahidul Islam Lecturer Dept. of Computer Science & Engineering
The 8085 Microprocessor Architecture
Chapter 4 Introduction to Computer Organization
8253 – PROGRAMMABLE INTERVAL TIMER (PIT). What is a Timer? Timer is a specialized type of device that is used to measure timing intervals. Timers can.
Chapter 5 Computer Organization
Modified from notes by Saeid Nooshabadi
William Stallings Computer Organization and Architecture 7th Edition
Microprocessor I 7/18/2019.
Computer Operation 6/22/2019.
Serial Communications
William Stallings Computer Organization and Architecture
Presentation transcript:

Suppose that a certain program takes 200 seconds of elapsed time to execute. Out of these 200 seconds, 180 seconds is the CPU time and the rest is I/O time. If the CPU performance improves by 40% every year for the next seven years because of developments in technology, but the I/O performance stays the same then

Review

CS501 Advanced Computer Architecture Lecture23 Dr.Noor Muhammad Sheikh

Elapsed time = CPU time + I/O time the I/O time = 200 – 180 = 20 sec which is 10 % of the elapsed time.

Year # CPU Time I/O Elapsed ...I/O Time.. Elapsed Time 180 20 200 10 % 1 129 149 13.42 % 2 92 112 17.85 % 3 66 86 23.25 % 4 47 67 29.85 % 5 34 54 37.03 % 6 24 44 45.45 % 7 17 37 54.05 %

For Pentium processor, the I/O devices are mapped on the I/O space. For SRC, there is no separate I/O space. Some address space out of the memory address space is used to map I/O devices in SRC.

Advantages of Memory Mapped I/O All the instructions which access memory can be used for I/O devices. No need for including separate I/O instructions in the ISA of the processor.

Disadvantages of Memory Mapped I/O The I/O interface will become complex. If partial decoding is used to reduce the complexity of the I/O interface, then a lot of memory addresses will be consumed.

The waveforms correspond to a “read” operation. A similar explanation is applied to a “write” operation. The latching of the incoming data can be done by the master either by using the rising edge of the Enable signal or by using its falling-edge.

Framing Error Parity Error Overrun Error Underrun Error

Framing Error A 0 is received instead of a stop bit (which is always a 1).

Parity Error The parity of the received data is not the same as it should be.

Overrun Error The prior character that was received, was not still read by the CPU and is over written by a new received character.

Underrun Error No character is available at the beginning of an interval.

Block diagram of a modern general purpose digital computer Computer bus or system bus Now we want to focus on what a computer is. The speaker may explain the building blocks in this slide The bus interface unit is usually between the CPU and the system.

PROCESSOR EXTERNAL BUS I/O Sub System HARD DISK CPU PROCESSOR EXTERNAL BUS BUS INTERFACE UNIT CD-ROM MEMORY BUS VIDEO CARD MONITOR MEMORY SYSTEM I/O BUS

Examples of I/O buses : The PCI bus The ISA bus

I/O buses provide an “abstract interface”. By standardizing the I/O buses, as done by several agencies, the third party manufacturers can build add-on sub systems for existing architectures. The location of these I/O buses may be different in different computers.

Earlier generation computers used a single bus to communicate with the memory as well as the I/O devices. This causes the bandwidth of the bus to shared between the memory and I/O devices.

Now-a-days ,the computers have separate memory and I/O buses. This situation gives more flexibility to users wanting to upgrade their existing systems.

Disadvantages of I/O Buses Every bus has a fixed bandwidth. Electrical constraints further reduce the bandwidth .

Problem Statement: What will be the implications? Consider an I/O bus that can transfer 4 bytes of data in one bus cycle. Suppose that a designer is considering to attach the following two components to this bus: Hard drive, with a transfer rate of 40MBytes/sec. Video card, with a transfer rate of 128MBytes/sec. What will be the implications?

The maximum frequency of the bus is 30 MHz. The maximum bandwidth = 30 x 4 of this bus = 120Mbytes/sec. The demand for bandwidth of these = 128 + 40 two components = 168Mbytes/sec

Conclusion: 168MBytes is more than the 120 Mbytes/sec that the bus can provide. One or both of these components will operate at reduced bandwidth.

Bus Arbitration