Back End Compiler Panel

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Presentation transcript:

Back End Compiler Panel Organizers: Robert Singleterry, NASA Vince Scarafino, Scarafino Consulting Panelists: Luiz DeRose, Cray Don Kretsch, Sun Steve Rowan, Convey Robert Geva, Intel Kevin Harris, SiCortex

Back End Compiler Panel – WHY? Focusing on the code generation aspects of advanced high performance computing compilers Interested in how the generated code can work with run time support to adapt across the spectrum of architectures Like to understand how unchanged applications can run optimally on powerful vector processors as well as cluster based machines with high counts of relatively low performance processors Not concentrating on compiler language characteristics, although there may be some specific directives that come to light as enablers Interested in exploring a way to provide higher levels of productivity for application writers The multi-core direction has the potential to make the next generation of computers significantly harder to program than anything we've seen to date

Back End Compiler Panel Questions 1) Are compiler code generation techniques going to transition along with the hardware transition from multi-core to many-core and hybrid systems and at what speed? 2) What information do you need from a Compiler Intermediate Format to efficiently utilize multi-core, many-core and hybrid systems that is not available from traditional languages like C, C++, or F90? Are you looking at directive-based or library-based approaches or is there another approach that you like? 3) Is embedded global memory addressing (like Co-Array Fortran) to be widely available and supported even on distributed memory systems? 4) What kind of hybrid systems or processor extensions are going to be supported by your compiler's code generation suite? 5) What new run-time libraries will be available to utilize multi-core, many-core, and hybrid systems and will they work seamlessly through dynamic linking?