Expand on these ideas for Q9 question and answer on the final

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Expand on these ideas for Q9 question and answer on the final Specialized Video (8-bit) and Vector (16-bit) Instructions on the Blackfin Expand on these ideas for Q9 question and answer on the final

Video , Copyright M. Smith, ECE, University of Calgary, Canada Problem to solve Using the video capability on Blackfin Specialized instruction Examine and explain examples in detail (working program) for Q9 format for final. Take something we have done in a laboratory and vectorize it for example Video , Copyright M. Smith, ECE, University of Calgary, Canada 2/17/2019

Blackfin Evaluation Board 8-bit values Video , Copyright M. Smith, ECE, University of Calgary, Canada 2/17/2019

Getting video information in DMA activity Values coming in using PPI (Parallel Port Interface) which shares many of its pins with PF Stored in SDRAM BF561 – 2 core Blackfin, handles both video in and out at the same time Possible Q9 question – one whole chapter in Hardware book on this area Web pages to go up on ECE-ADI-Project pages soon Video , Copyright M. Smith, ECE, University of Calgary, Canada 2/17/2019

Video , Copyright M. Smith, ECE, University of Calgary, Canada Special 8 bit ALUS Video , Copyright M. Smith, ECE, University of Calgary, Canada 2/17/2019

Video image Blanking information Frame 1 - luminance + colour information Blanking information Frame 2 - luminance + colour information Blanking information Have ability to manipulate frame information with touching blanking information Video , Copyright M. Smith, ECE, University of Calgary, Canada 2/17/2019

Frame information Pixel 1 uses G1 + CB1 + CR1 Image brightness decreasing Video , Copyright M. Smith, ECE, University of Calgary, Canada 2/17/2019

Video , Copyright M. Smith, ECE, University of Calgary, Canada Frame information R0 = [P0] brings in information on pixel 1 and 2 intensity and colour One memory access, 2 pixel info One memory access, 4 pixel intensity information CB1 G1 CR1 G2 CB3 G3 CR3 G4 CB5 G5 CR5 G6 G1 G2 G3 G4 G5 G6 G7 G8 Video , Copyright M. Smith, ECE, University of Calgary, Canada 2/17/2019

BYTEOP16P (Quad 8-bit ADD) 8 pixel values stored in R1 and R0 I0 register used to select which 4 pixel values used in operations – called “byte alignment” I0 = 0; use all bytes in R0 I0 = 1; Lowest byte in R1, top 3 in R0 8 pixel value stored in R3 and R2 I1 used to select the 4 pixels used If I0=1, I1 = 1; and (R4, R6) = byteop16p(R3:2, R1:0) ; // sum then we got 4 16-bit answers -- “my byte notation” R4.H = R3.B0 + R1.B0; // Bottom byte R4.L = R2.B3 + R0.B3; // Highest byte R6.H = R2.B2 + R0.B2; // Next highest byte R6.L = R2.B1 + R0.B1; // Next highest byte Video , Copyright M. Smith, ECE, University of Calgary, Canada 2/17/2019

BYTEOP1P (Quad 8-bit Average) 8 pixel values stored in R1 and R0 I0 register used to select which 4 pixel values used in operations – called “byte alignment” I0 = 0; use all bytes in R0 I0 = 1; Lowest byte in R1, top 3 in R0 8 pixel value stored in R3 and R2 I1 used to select the 4 pixels used If I0=1, I1 = 1; and R4 = byteop1p(R3:2, R1:0) ; // sum and average then we got 4 16-bit answers R4.B3 = (R3.B0 + R1.B0) / 2; // Bottom byte R4.B2 = (R2.B3 + R0.B3) / 2; // Highest byte R4.B1 = (R2.B2 + R0.B2) / 2; // Next highest byte R4.B0 = (R2.B1 + R0.B1) / 2; // Next highest byte Video , Copyright M. Smith, ECE, University of Calgary, Canada 2/17/2019

BYTEOP2P (Quad 8-bit Average Half word) 8 pixel values stored in R1 and R0 I0 register used to select which 4 pixel values used in operations – called “byte alignment” I0 = 0; use all bytes in R0 I0 = 1; Lowest byte in R1, top 3 in R0 8 pixel value stored in R3 and R2 I1 used to select the 4 pixels used If I0=1, I1 = 1; and R4 = byteop2p(R3:2, R1:0) ; // sum and average then we got 4 16-bit answers R4.B2 = (R3.B0 + R1.B0 + R2.B3 + R0.B3) / 4; // Highest 4 bytes R4.B0 = (R2.B2 + R0.B2 + R2.B1 + R0.B1) / 4; Video , Copyright M. Smith, ECE, University of Calgary, Canada 2/17/2019

BYTEOP16M (Quad 8-bit SUBTRACT) 8 pixel values stored in R1 and R0 I0 register used to select which 4 pixel values used in operations – called “byte alignment” I0 = 0; use all bytes in R0 I0 = 1; Lowest byte in R1, top 3 in R0 8 pixel value stored in R3 and R2 I1 used to select the 4 pixels used If I0=1, I1 = 1; and (R4, R6) = byteop16M(R3:2, R1:0) ; // sum then we got 4 16-bit answers -- “my byte notation” R4.H = R3.B0 - R1.B0; // Bottom byte R4.L = R2.B3 - R0.B3; // Highest byte R6.H = R2.B2 - R0.B2; // Next highest byte R6.L = R2.B1 - R0.B1; // Next highest byte Video , Copyright M. Smith, ECE, University of Calgary, Canada 2/17/2019

SAA -- Quad 4-bit Subtract, Absolute and Accumulate Take the differences between 2 images R0 = [P0++]; -- 4 pixels – image 1 R1 = [I1++]; -- 4 pixels -- image 2 R2 = 0; sum of differences Loop N - 1 times R2 = SAA(R1, R0) || R0 = [P0++] || R1 = [I1++]; R2 = SAA(R1, R0); Now add the 4 bytes together from R2 How to do efficiently – sounds like Q9 question to me Video , Copyright M. Smith, ECE, University of Calgary, Canada 2/17/2019

Video , Copyright M. Smith, ECE, University of Calgary, Canada Worked Examples Video , Copyright M. Smith, ECE, University of Calgary, Canada 2/17/2019

Video , Copyright M. Smith, ECE, University of Calgary, Canada Vector operations Many of the operations give 16 bit results Example Quad 8-bit Add (R4, R6) = byteop16P(R3:2, R1:0) Now you want to add the results together R5 = R4 +|- R6; R4.H + R6.H with R4.L + R6.L R5.L = R5.H + R5.L (NS); Video , Copyright M. Smith, ECE, University of Calgary, Canada 2/17/2019

Video , Copyright M. Smith, ECE, University of Calgary, Canada Vector operations R0 = R1 +|+ R0; R1.H + R0.H, R1.L + R0.L R0 = R1 +|+ R0 (co); R1.H + R0.L, R1.L + R0.H co – word order “cross over” Can be +|+, +|-, -|+ or -|-; R3 = R1 + R0, R4 = R1 – R0; 32 bit add and subtract at same time Must use same source registers R3 = R1 +|+ R0, R1 -|- R0; 2 16-bit adds and 2 16-bit subtracts at same time R3 = R1 +|+ R0, R1 -|- R0 (asr); 2 16-bit adds and 2 16-bit subtracts at same time – and then afterwards do an arithmetic shift right (add and average, subtract and average) Video , Copyright M. Smith, ECE, University of Calgary, Canada 2/17/2019

Video , Copyright M. Smith, ECE, University of Calgary, Canada Vector operations Normal max instruction (32-bit) R0 = MAX(R1, R2); R0 is largest of R1 and R2 Ditto MIN(R1, R2); Vector max R0 = MAX(R1, R2) (V) R0.H is largest of R1.H and R2.H R0.L is largest of R0.L and R2.L Video , Copyright M. Smith, ECE, University of Calgary, Canada 2/17/2019

VIT_MAX – Compare and Select R0 = VIT_MAX(R1, R2); R1 = 0x23000002 R2 = 0x70000001 R2.H and R1.L are largest R0 = 0x70000002 A0.W = binary 10 indicating R2.H and R1.L was largest Video , Copyright M. Smith, ECE, University of Calgary, Canada 2/17/2019

Other neat vector operations Vector ABS R2 = ABS R1 (V); absolute values of R1.H and R1.L stored in R2 Vector arithmetic shift R2 = R1 >>> 3 (V) – 2 16-bit shifts Vector multiply and accumulate Vector Negate -- etc Video , Copyright M. Smith, ECE, University of Calgary, Canada 2/17/2019

Video , Copyright M. Smith, ECE, University of Calgary, Canada Worked examples Video , Copyright M. Smith, ECE, University of Calgary, Canada 2/17/2019

Video , Copyright M. Smith, ECE, University of Calgary, Canada Problem to solve Using the video capability on Blackfin Specialized instruction Examine and explain examples in detail (working program) for Q9 format for final. Take something we have done in a laboratory and vectorize it for example Video , Copyright M. Smith, ECE, University of Calgary, Canada 2/17/2019

Video , Copyright M. Smith, ECE, University of Calgary, Canada Information taken from Analog Devices On-line Manuals with permission http://www.analog.com/processors/resources/technicalLibrary/manuals/ Information furnished by Analog Devices is believed to be accurate and reliable. However, Analog Devices assumes no responsibility for its use or for any infringement of any patent other rights of any third party which may result from its use. No license is granted by implication or otherwise under any patent or patent right of Analog Devices. Copyright  Analog Devices, Inc. All rights reserved. Video , Copyright M. Smith, ECE, University of Calgary, Canada 2/17/2019