Design of an LC-VCO with One Octave Tuning Range Andreas Kämpe and Håkan Olsson Radio Electronics-LECS/IMIT Royal Institute of Technology (KTH)

Introduction VCO research has largely focused on reducing phase noise, not tuning range. Multi standard transceivers requires wideband VCOs with low phase noise Goal: Designing a VCO with one octave tuning range while maintaining a low phase noise and low power consumption.

VCO topologies LC tank Delay element + Low phase-noise. + Low power consumption Large chip area Tuning range (limited by CMAX/CMIN). Delay element Ring, transmission line, and relaxation oscillators + Small chip area - High phase noise and realativly high power consumption.

VCO Architecture Complementary structure (N & P) MOS => larger amplitude and symetric rise/fall time => Reduced power / phase noise

LC-tank and wide tuning range One octave tuning range => Requires a Capacitance tuning of 2 octaves. Tuning capacitor Cmax / Cmin > 4 (paracitcs: CP) Low voltage and large Cmax/Cmin => High varactor sensitivity (VCO gain) => sensitive to noise on the control line.

Discrete tuning Bandswitching CMOS technology offers excellent switches. Bandswitching The switched capacitors are used as band selectors (coarse tuning) Channel selection is performed digitally. + Increased tuning range + Reduces the varactor gain => phase noise reduction.

Switch limitations (MOSFET) Low capacitive load  Large tuning range Minimum loss  Low power consumption

Loss or capacitive load. Trade-off Loss or capacitive load. Minimum loss = reduce Rds-on = wide transistor with minimum gate length. Minimum capacitive load = reduce Cgs /Cgd = narrow transistor with minimum gate length.

NMOS transistors (higher transconductance). Switch Optimisation NMOS transistors (higher transconductance). Drain / source are AC coupled (band sw cap) and biased via resistors => maximizes (Vgs-Vt) => Reduced Rds-on

Switch On Switch on: Vgs = 1.8 V => Minimum RDS

Switch Off Switch off: Vgs = -1.8 V => 20% reduction in capacitance compared to having Drain and Source biased at 0 V.

3bits binary weighted Capacitor array.

Varactor Less steep voltage to capacitance transfer. Accumulation-mode mos varactors => Less steep voltage to capacitance transfer. 4 varactors are conected anti parallell => Differential operation and control => Common mode rejection

Inductor + Differential inductor (increased coupling). + 3 metal layers (M6, M5, M4) are stacked on top of each other => reduces the series resistance. => increased Q - Increased capacitive load (Lower metal layers are closer to the substrate).

Inductor simulations Optimized and designed with ASITIC and ADS.

Inductor model Lumped model of a transmission line.

Inductor-model simulations Lumped model error ”Real(S)”.

Inductor-model simulations Lumped model error ”Imag(S)”.

Amplitude Variations Requires an adjustable negative resistance => The oscillation amplitude varies considerably across the wide tuning range Requires an adjustable negative resistance => Achieved by controlling the biasing current.

VCO The band selection also controlles the biasing current. => Constant oscillation amplitude over the entire tuning range.

Tuning range Large tunability 1.2 GHz – 2.6 GHz.

VCO’s VCO Tech [um] Tuning range [%] FOM [dBc/Hz] “A 5.9 GHz Voltage-Controlled Ring Oscillator in 0.18 μm CMOS”, IEEE J. Solid-State Circuits 39, pp. 230- 233, Jan 2004. 0.25 18 -183 “A 1.8 GHz higly-tunable low phase-noise CMOS VCO”. Custom Integrated Circuits Conference, 2000. CICC. Proceedings of the IEEE 2000, pp. 585-588. 21-24 May 2000. 28 ”New wideband/dualband CMOS LC voltage-controlled oscillator”. Circuits, Devices and Systems, VOl 150. Proceedings of the IEEE 2003, pp. 453-459 6 Oct 2003. 98 -158.3* “A 15-mW Fully Integrated I/Q Synthesizer for Bluetooth in 0.18 μm CMOS”, IEEE J. Solid-State Circuits 38, pp. 1155 - 1162, July 2003. 0.18 16 -174.5* “Design of Wide-Band CMOS VCO for Multiband Wireless LAN Applications”, IEEE J. Solid-State Circuits 38, pp. 1333 - 1342, August 2003. 0.13 SOI 58.7 -186.6 This 74 -190 * Quadrature VCO

Conclusions It is possible for a VCO to have a large tuning range combined with a low phase noise and low power consumption. This design has a very good performance expressed in FOM (-190 dBc/Hz/mW) and superior if the wide tuning range is taken in account. Large chip Area, due to many capacitors and a large inductor. If the oscillator was designed to be operated at a higer frequency, the Chip area could be decreced (smaller LC tank) The down side is an increaced loss in the switches (capacitor array).

Complementary or NMOS-only 1 ID(n + p) = ID(n-only) Equal gm: gm(n + p) = gm(n-only)

Complementary or NMOS-only 2 Symetric rise/fall time: