Lab 2 Part II Instructions By Yeong Choo and Sam Kanawati The University of Texas at Austin, February 05, 2018

Lab Overview For this lab, we would implement sinusoidal signal generation in software with look-up table (LUT) method and enhanced direct memory access (EDMA) output method. This combination of implementation would increase the system throughput as the processor is available to handle any other foreground task. Keep in mind that EDMA controller unit does not have arithmetic and logic units. Most of the EDMA implementation is provided. Your main task is to understand the EDMA implementation and provide the initialization of corresponding LUT. That would conclude the study of tradeoffs between multiple sinusoidal generation and output method. Do not add Target Configuration or GEL files in this lab and do not reset the board between the first and second parts

Talk through using EDMA Please connect the DSP board to the PC using the USB cable, and connect the oscilloscope to the line out port, signal generator to the line in port. Follow instructions in “http://rt-dsp.com/2nd_ed/app_a/App_CCS_6_1_LCDK.pdf” for the detailed steps to create a project. But, instead of vectors.asm, please add vectors_EDMA.asm file and do not add main.c. Also, migrate to C:\CD\code\chapter_06\ccs\Frame_EDMA_6748 to add all the files. Run the program. It shows the talk through application. Show your program to your TA. Do not add Target Configuration or GEL files in this lab and do not reset the board between the first and second parts

Sinusoidal Generation using EDMA -- Project Setup Please connect the DSP board to the PC using the USB cable, and connect the oscilloscope to the line out port. Create another project following the same instructions as before, but replace the following files with the ones you downloaded from the course website. frame.h ISRs.c - don’t copy the contents of C:\CD\FrameEDMA.txt main.c – delete all text in the while loop Go to DSP_Config.h and change the sampling frequency to 8 kHz. Do not add Target Configuration or GEL files in this lab and do not reset the board between the first and second parts

Sinusoidal Generation using EDMA -- Project Edit Create a function called createtable() with these instructions: Enter your own version of generating a table of cosine wave values at a frequency of 1 kHz and 2 kHz at a sampling frequency of 8 kHz. The table should have the minimum number of entries. Use a suitable scale factor! (Hint: the number of bits used in DAC) Generate the table entries in float, then cast them to Uint32 after appropriate scaling. Read the comments in the createtable() functions in ISRs.c. Generate a sine wave of frequency 1 kHz. Run the program to see the sinusoidal signal on the oscilloscope. Repeat the program for 2 kHz Please profile the number of clock cycles needed for a single sinf/cosf function call in CCS. (Include a screenshot) Show your program to your TA.. Please provide two screenshots and ISR code change in the lab report.

Lab Report Assignment Explain (mathematically) what happened when 6 kHz & 7 kHz sine waves were generated for a sample rate of 8 kHz. Compare and contrast the three methods for sending the samples of the sinewave to the codec (polling, interrupt, DMA) Scaling factor: Why is the scaling factor necessary? What would happen if the scaling factor was left out? How many cycles does a single call to sin() take? Calculate the number of cycles that occur between samples. Assume the DSP runs at 375 MHz. (And feel free to comment on these two results)

Lab Report Submission Requirement Please refer general format listed under “Lab Report” section at, http://users.ece.utexas.edu/~bevans/courses/realtime/lectures/laboratory/c6748winDSK/lab2/index.html Please attach screenshots from oscilloscope (Lab 2 Part 1 and Lab 2 Part 2) and any code change in Interrupt Service Routine (ISR) in lab report. Please answer the above assignments question in lab report. For full credit, please provide all your work in code changes and screenshots. Please submit your pdf format of lab report and codes in zip folder and submit to Canvas before the deadline.