One’s complement addition

Slides:



Advertisements
Similar presentations
Combinational Circuits
Advertisements

Combinational Circuits
EET 1131 Unit 7 Arithmetic Operations and Circuits
Arithmetic Functions and Circuits
Cosc 2150: Computer Organization Chapter 3: Boolean Algebra and Digital Logic.
Chapter 10-Arithmetic-logic units
Arithmetic-Logic Units (ALUs). The four-bit adder The basic four-bit adder always computes S = A + B + CI But by changing what goes into the adder inputs.
Arithmetic-logic units
Operations on data CHAPTER 4.
4 Operations On Data Foundations of Computer Science ã Cengage Learning.
1 Modified from  Modified from 1998 Morgan Kaufmann Publishers Chapter Three: Arithmetic for Computers citation and following credit line is included:
Basic Arithmetic (adding and subtracting)
CS1Q Computer Systems Lecture 9 Simon Gay. Lecture 9CS1Q Computer Systems - Simon Gay2 Addition We want to be able to do arithmetic on computers and therefore.
IT253: Computer Organization
Digital Arithmetic and Arithmetic Circuits
Chapter 6-1 ALU, Adder and Subtractor
June 19, 2002Addition and multiplication1 Delays in the ripple carry adder The diagram below shows a 4-bit adder completely drawn out. This is called a.
Arithmetic Logic Unit (ALU) Anna Kurek CS 147 Spring 2008.
1 Lecture 6 BOOLEAN ALGEBRA and GATES Building a 32 bit processor PH 3: B.1-B.5.
July 2, 2002Latches1 Defining a logic unit A logic unit supports different logical functions on two multi-bit inputs X and Y, producing an output G. This.
Sep 29, 2004Subtraction (lvk)1 Negative Numbers and Subtraction The adders we designed can add only non-negative numbers – If we can represent negative.
Data Representation in Computer Systems. 2 Signed Integer Representation The conversions we have so far presented have involved only positive numbers.
June 10, 2002© Howard Huang1 Number systems To get started, we’ll discuss one of the fundamental concepts underlying digital computer design:
Digital Logic Lecture 3 Binary Arithmetic By Zyad Dwekat The Hashemite University Computer Engineering Department.
CPS3340 Computer Architecture Fall Semester, 2013
Arithmetic-logic units1 An arithmetic-logic unit, or ALU, performs many different arithmetic and logic operations. The ALU is the “heart” of a processor—you.
Addition and multiplication Arithmetic is the most basic thing you can do with a computer, but it’s not as easy as you might expect! These next few lectures.
LECTURE 4 Logic Design. LOGIC DESIGN We already know that the language of the machine is binary – that is, sequences of 1’s and 0’s. But why is this?
ECE DIGITAL LOGIC LECTURE 15: COMBINATIONAL CIRCUITS Assistant Prof. Fareena Saqib Florida Institute of Technology Fall 2015, 10/20/2015.
©2010 Cengage Learning SLIDES FOR CHAPTER 4 APPLICATIONS OF BOOLEAN ALGEBRA MINTERM AND MAXTERM EXPANSIONS Click the mouse to move to the next page. Use.
UNIT 4 APPLICATIONS OF BOOLEAN ALGEBRA MINTERM AND MAXTERM EXPANSIONS Click the mouse to move to the next page. Use the ESC key to exit this chapter. This.
Addition and multiplication1 Arithmetic is the most basic thing you can do with a computer, but it’s not as easy as you might expect! These next few lectures.
William Stallings Computer Organization and Architecture 8th Edition
Unit 1 Introduction Number Systems and Conversion.
Cosc 2150: Computer Organization
Prof. Sin-Min Lee Department of Computer Science
Negative Numbers and Subtraction
Chapter 4 Operations on Bits.
Digital Logic & Design Dr. Waseem Ikram Lecture 02.
Data Representation in Computer Systems
Addition and multiplication
Binary Addition and Subtraction
Digital Systems Section 8 Multiplexers. Digital Systems Section 8 Multiplexers.
Circuit analysis summary
Fundamentals & Ethics of Information Systems IS 201
University of Gujrat Department of Computer Science
Wakerly Section 2.4 and further
MIPS ALU.
Additional Gates and Decoders
King Fahd University of Petroleum and Minerals
Arithmetic Circuits (Part I) Randy H
Numbers and Arithmetic
Subtraction The arithmetic we did so far was limited to unsigned (positive) integers. Today we’ll consider negative numbers and subtraction. The main problem.
Digital Logic & Design Lecture 02.
Digital Systems Section 12 Binary Adders. Digital Systems Section 12 Binary Adders.
Unit 10 Arithmetic-logic Units
Overview Part 1 – Design Procedure Part 2 – Combinational Logic
Arithmetic and Decisions
Branch instructions We’ll implement branch instructions for the eight different conditions shown here. Bits 11-9 of the opcode field will indicate the.
Addition and multiplication
From now on: Combinatorial Circuits:
Addition and multiplication
Control units In the last lecture, we introduced the basic structure of a control unit, and translated our assembly instructions into a binary representation.
ECE 352 Digital System Fundamentals
ECE 352 Digital System Fundamentals
Karnaugh maps Last time we saw applications of Boolean logic to circuit design. The basic Boolean operations are AND, OR and NOT. These operations can.
Basic circuit analysis and design
Chapter3 Fixed Point Representation
靜夜思 床前明月光, 疑是地上霜。 舉頭望明月, 低頭思故鄉。 ~ 李白 李商隱.
Presentation transcript:

One’s complement addition To add one’s complement numbers: First do unsigned addition on the numbers, including the sign bits. Then take the carry out and add it to the sum. Two examples: This is simpler and more uniform than signed magnitude addition. 0111 (+7) + 1011 + (-4) 1 0010 0010 + 1 0011 (+3) 0011 (+3) + 0010 + (+2) 0 0101 0101 + 0 0101 (+5) 2/22/2019 Arithmetic-logic units

Arithmetic-logic units Two’s complement Our final idea is two’s complement. To negate a number, complement each bit (just as for ones’ complement) and then add 1. Examples: 11012 = 1310 (a 4-bit unsigned number) 0 1101 = +1310 (a positive number in 5-bit two’s complement) 1 0010 = -1310 (a negative number in 5-bit ones’ complement) 1 0011 = -1310 (a negative number in 5-bit two’s complement) 01002 = 410 (a 4-bit unsigned number) 0 0100 = +410 (a positive number in 5-bit two’s complement) 1 1011 = -410 (a negative number in 5-bit ones’ complement) 1 1100 = -410 (a negative number in 5-bit two’s complement) 2/22/2019 Arithmetic-logic units

More about two’s complement Two other equivalent ways to negate two’s complement numbers: You can subtract an n-bit two’s complement number from 2n. You can complement all of the bits to the left of the rightmost 1. 01101 = +1310 (a positive number in two’s complement) 10011 = -1310 (a negative number in two’s complement) 00100 = +410 (a positive number in two’s complement) 11100 = -410 (a negative number in two’s complement) Often, people talk about “taking the two’s complement” of a number. This is a confusing phrase, but it usually means to negate some number that’s already in two’s complement format. 1 0 0 0 0 0 - 0 1 1 0 1 (+1310) 1 0 0 1 1 (-1310) 1 0 0 0 0 0 - 0 0 1 0 0 (+410) 1 1 1 0 0 (-410) 2/22/2019 Arithmetic-logic units

Two’s complement addition Negating a two’s complement number takes a bit of work, but addition is much easier than with the other two systems. To find A + B, you just have to: Do unsigned addition on A and B, including their sign bits. Ignore any carry out. For example, to find 0111 + 1100, or (+7) + (-4): First add 0111 + 1100 as unsigned numbers: Discard the carry out (1). The answer is 0011 (+3). 0 1 1 1 + 1 1 0 0 1 0 0 1 1 2/22/2019 Arithmetic-logic units

Another two’s complement example To further convince you that this works, let’s try adding two negative numbers—1101 + 1110, or (-3) + (-2) in decimal. Adding the numbers gives 11011: Dropping the carry out (1) leaves us with the answer, 1011 (-5). 1 1 0 1 + 1 1 1 0 1 1 0 1 1 2/22/2019 Arithmetic-logic units

Arithmetic-logic units Why does this work? For n-bit numbers, the negation of B in two’s complement is 2n - B (this is one of the alternative ways of negating a two’s-complement number). A - B = A + (-B) = A + (2n - B) = (A - B) + 2n If A  B, then (A - B) is a positive number, and 2n represents a carry out of 1. Discarding this carry out is equivalent to subtracting 2n, which leaves us with the desired result (A - B). If A  B, then (A - B) is a negative number and we have 2n - (A - B). This corresponds to the desired result, -(A - B), in two’s complement form. 2/22/2019 Arithmetic-logic units

Comparing the signed number systems Here are all the 4-bit numbers in the different systems. Positive numbers are the same in all three representations. Signed magnitude and one’s complement have two ways of representing 0. This makes things more complicated. Two’s complement has asymmetric ranges; there is one more negative number than positive number. Here, you can represent -8 but not +8. However, two’s complement is preferred because it has only one 0, and its addition algorithm is the simplest. 2/22/2019 Arithmetic-logic units

Ranges of the signed number systems How many negative and positive numbers can be represented in each of the different systems on the previous page? In general, with n-bit numbers including the sign, the ranges are: 2/22/2019 Arithmetic-logic units

Converting signed numbers to decimal Convert 110101 to decimal, assuming this is a number in: (a) signed magnitude format (b) ones’ complement (c) two’s complement 2/22/2019 Arithmetic-logic units

Arithmetic-logic units Example solution Convert 110101 to decimal, assuming this is a number in: Since the sign bit is 1, this is a negative number. The easiest way to find the magnitude is to convert it to a positive number. (a) signed magnitude format Negating the original number, 110101, gives 010101, which is +21 in decimal. So 110101 must represent -21. (b) ones’ complement Negating 110101 in ones’ complement yields 001010 = +1010, so the original number must have been -1010. (c) two’s complement Negating 110101 in two’s complement gives 001011 = 1110, which means 110101 = -1110. The most important point here is that a binary number has different meanings depending on which representation is assumed. 2/22/2019 Arithmetic-logic units

Our four-bit unsigned adder circuit Here is the four-bit unsigned addition circuit from an earlier lecture. 2/22/2019 Arithmetic-logic units

Making a subtraction circuit We could build a subtraction circuit directly, similar to the way we made unsigned adders yesterday. However, by using two’s complement we can convert any subtraction problem into an addition problem. Algebraically, A - B = A + (-B) So to subtract B from A, we can instead add the negation of B to A. This way we can re-use the unsigned adder hardware from last week. 2/22/2019 Arithmetic-logic units

A two’s complement subtraction circuit To find A - B with an adder, we’ll need to: Complement each bit of B. Set the adder’s carry in to 1. The net result is A + B’ + 1, where B’ + 1 is the two’s complement negation of B. Remember that A3, B3 and S3 here are actually sign bits. 2/22/2019 Arithmetic-logic units

Arithmetic-logic units Small differences The only differences between the adder and subtractor circuits are: The subtractor has to negate B3 B2 B1 B0. The subtractor sets the initial carry in to 1, instead of 0. It’s not too hard to make one circuit that does both addition and subtraction. 2/22/2019 Arithmetic-logic units

An adder-subtractor circuit XOR gates let us selectively complement the B input. X  0 = X X  1 = X’ When Sub = 0, the XOR gates output B3 B2 B1 B0 and the carry in is 0. The adder output will be A + B + 0, or just A + B. When Sub = 1, the XOR gates output B3’ B2’ B1’ B0’ and the carry in is 1. Thus, the adder output will be a two’s complement subtraction, A - B. 2/22/2019 Arithmetic-logic units

Arithmetic-logic units Signed overflow With two’s complement and a 4-bit adder, for example, the largest representable decimal number is +7, and the smallest is -8. What if you try to compute 4 + 5, or (-4) + (-5)? We cannot just include the carry out to produce a five-digit result, as for unsigned addition. If we did, (-4) + (-5) would result in +23! Also, unlike the case with unsigned numbers, the carry out cannot be used to detect overflow, by itself In the example on the left, the carry out is 0 but there is overflow. Conversely, there are situations where the carry out is 1 but there is no overflow. 0 1 0 0 (+4) + 0 1 0 1 (+5) 0 1 0 0 1 (-7) 1 1 0 0 (-4) + 1 0 1 1 (-5) 1 0 1 1 1 (+7) 2/22/2019 Arithmetic-logic units

Detecting signed overflow The easiest way to detect signed overflow is to look at all the sign bits. Overflow occurs only in the two situations above: If you add two positive numbers and get a negative result. If you add two negative numbers and get a positive result. Overflow cannot occur if you add a positive number to a negative number. Do you see why? 0 1 0 0 (+4) + 0 1 0 1 (+5) 0 1 0 0 1 (-7) 1 1 0 0 (-4) + 1 0 1 1 (-5) 1 0 1 1 1 (+7) 2/22/2019 Arithmetic-logic units

Arithmetic-logic units Sign extension In everyday life, decimal numbers are assumed to have an infinite number of 0s in front of them. This helps in “lining up” numbers. To subtract 231 and 3, for instance, you can imagine: 231 - 003 228 You need to be careful in extending signed binary numbers, because the leftmost bit is the sign and not part of the magnitude. If you just add 0s in front, you might accidentally change a negative number into a positive one! For example, going from 4-bit to 8-bit numbers: 0101 (+5) should become 0000 0101 (+5). But 1100 (-4) should become 1111 1100 (-4). The proper way to extend a signed binary number is to replicate the sign bit, so the sign is preserved. 2/22/2019 Arithmetic-logic units

Arithmetic-logic units Subtraction summary A good representation for negative numbers makes subtraction hardware much easier to design. Two’s complement is used most often (although signed magnitude shows up sometimes, such as in floating-point systems, which we’ll discuss on Wednesday). Using two’s complement, we can build a subtractor with minor changes to the adder from last week. We can also make a single circuit which can both add and subtract. Overflow is still a problem, but signed overflow is very different from the unsigned overflow we mentioned last time. Sign extension is needed to properly “lengthen” negative numbers. Tomorrow we’ll use most of the ideas we’ve seen so far to build an ALU – an important part of a processor. 2/22/2019 Arithmetic-logic units

Arithmetic-logic units An arithmetic-logic unit, or ALU, performs many different arithmetic and logic operations. The ALU is the “heart” of a processor—you could say that everything else in the CPU is there to support the ALU. Here’s the plan: We’ll show an arithmetic unit first, by building off ideas from the adder-subtractor circuit. Then we’ll talk about logic operations a bit, and build a logic unit. Finally, we put these pieces together using multiplexers. We show the same examples as from the book (pp. 360-365), but things are re-labeled to be clearer in LogicWorks. Cin and S0 are also treated a little differently. 2/22/2019 Arithmetic-logic units

Arithmetic-logic units The four-bit adder The basic four-bit adder always computes S = A + B + CI. But by changing what goes into the adder inputs A, B and CI, we can change the adder output S. This is also what we did to build the combined adder-subtractor circuit. 2/22/2019 Arithmetic-logic units

It’s the adder-subtractor again! Here the signal Sub and some XOR gates alter the adder inputs. When Sub = 0, the adder inputs A, B, CI are Y, X, 0, so the adder produces G = X + Y + 0, or just X + Y. When Sub = 1, the adder inputs are Y’, X and 1, so the adder output is G = X + Y’ + 1, or the two’s complement operation X - Y. 2/22/2019 Arithmetic-logic units

The multi-talented adder So we have one adder performing two separate functions. “Sub” acts like a function select input which determines whether the circuit performs addition or subtraction. Circuit-wise, all “Sub” does is modify the adder’s inputs A and CI. 2/22/2019 Arithmetic-logic units

Modifying the adder inputs By following the same approach, we can use an adder to compute other functions as well. We just have to figure out which functions we want, and then put the right circuitry into the “Input Logic” box . 2/22/2019 Arithmetic-logic units

Some more possible functions We already saw how to set adder inputs A, B and CI to compute either X + Y or X - Y. How can we produce the increment function G = X + 1? How about decrement: G = X - 1? How about transfer: G = X? (This can be useful.) This is almost the same as the increment function! One way: Set A = 0000, B = X, and CI = 1 A = 1111 (-1), B = X, CI = 0 A = 0000, B = X, CI = 0 2/22/2019 Arithmetic-logic units

Arithmetic-logic units The role of CI The transfer and increment operations have the same A and B inputs, and differ only in the CI input. In general we can get additional functions (not all of them useful) by using both CI = 0 and CI = 1. Another example: Two’s-complement subtraction is obtained by setting A = Y’, B = X, and CI = 1, so G = X + Y’ + 1. If we keep A = Y’ and B = X, but set CI to 0, we get G = X + Y’. This turns out to be a ones’ complement subtraction operation. 2/22/2019 Arithmetic-logic units

Table of arithmetic functions Here are some of the different possible arithmetic operations. We’ll need some way to specify which function we’re interested in, so we’ve randomly assigned a selection code to each operation. 2/22/2019 Arithmetic-logic units

Mapping the table to an adder This second table shows what the adder’s inputs should be for each of our eight desired arithmetic operations. Adder input CI is always the same as selection code bit S0. B is always set to X. A depends only on S2 and S1. These equations depend on both the desired operations and the assignment of selection codes. 2/22/2019 Arithmetic-logic units

Building the input logic All we need to do is compute the adder input A, given the arithmetic unit input Y and the function select code S (actually just S2 and S1). Here is an abbreviated truth table: We want to pick one of these four possible values for A, depending on S2 and S1. 2/22/2019 Arithmetic-logic units

Primitive gate-based input logic We could build this circuit using primitive gates. If we want to use K-maps for simplification, then we should first expand out the abbreviated truth table. The Y that appears in the output column (A) is actually an input. We make that explicit in the table on the right. Remember A and Y are each 4 bits long! 2/22/2019 Arithmetic-logic units

Primitive gate implementation From the truth table, we can find an MSP: Again, we have to repeat this once for each bit Y3-Y0, connecting to the adder inputs A3-A0. This completes our arithmetic unit. Ai = S2Yi’ + S1Yi 2/22/2019 Arithmetic-logic units

Arithmetic-logic units Bitwise operations Most computers also support logical operations like AND, OR and NOT, but extended to multi-bit words instead of just single bits. To apply a logical operation to two words X and Y, apply the operation on each pair of bits Xi and Yi: We’ve already seen this informally in two’s-complement arithmetic, when we talked about “complementing” all the bits in a number. 1 0 1 1 AND 1 1 1 0 1 0 1 0 1 0 1 1 OR 1 1 1 0 1 1 1 1 1 0 1 1 XOR 1 1 1 0 0 1 0 1 2/22/2019 Arithmetic-logic units

Bitwise operations in programming Languages like C, C++ and Java provide bitwise logical operations: & (AND) | (OR) ^ (XOR) ~ (NOT) These operations treat each integer as a bunch of individual bits: 13 & 25 = 9 because 01101 & 11001 = 01001 They are not the same as the operators &&, || and !, which treat each integer as a single logical value (0 is false, everything else is true): 13 && 25 = 1 because true && true = true Bitwise operators are often used in programs to set a bunch of Boolean options, or flags, with one argument. Easy to represent sets of fixed universe size with bits: 1: is member, 0 not a member. Unions: OR, Intersections: AND 2/22/2019 Arithmetic-logic units

Bitwise operations in networking IP addresses are actually 32-bit binary numbers, and bitwise operations can be used to find network information. For example, you can bitwise-AND an address 192.168.10.43 with a “subnet mask” to find the “network address,” or which network the machine is connected to. 192.168. 10. 43 = 11000000.10101000.00001010.00101011 & 255.255.255.224 = 11111111.11111111.11111111.11100000 192.168. 10. 32 = 11000000.10101000.00001010.00100000 You can use bitwise-OR to generate a “broadcast address,” for sending data to all machines on the local network. | 0. 0. 0. 31 = 00000000.00000000.00000000.00011111 192.168. 10. 63 = 11000000.10101000.00001010.00111111 2/22/2019 Arithmetic-logic units

Arithmetic-logic units Defining a logic unit A logic unit supports different logical functions on two multi-bit inputs X and Y, producing an output G. This abbreviated table shows four possible functions and assigns a selection code S to each. We’ll just use multiplexers and some primitive gates to implement this. Again, we need one multiplexer for each bit of X and Y. 2/22/2019 Arithmetic-logic units

Arithmetic-logic units Our simple logic unit Inputs: X (4 bits) Y (4 bits) S (2 bits) Outputs: G (4 bits) 2/22/2019 Arithmetic-logic units

Combining the arithmetic and logic units Now we have two pieces of the puzzle: An arithmetic unit that can compute eight functions on 4-bit inputs. A logic unit that can perform four functions on 4-bit inputs. We can combine these together into a single circuit, an arithmetic-logic unit (ALU). 2/22/2019 Arithmetic-logic units

Arithmetic-logic units Our ALU function table This table shows a sample function table for an ALU. All of the arithmetic operations have S3=0, and all of the logical operations have S3=1. These are the same functions we saw when we built our arithmetic and logic units a few minutes ago. Since our ALU only has 4 logical operations, we don’t need S2. The operation done by the logic unit depends only on S1 and S0. 2/22/2019 Arithmetic-logic units

Arithmetic-logic units A complete ALU circuit The / and 4 on a line indicate that it’s actually four lines. 4 Cout should be ignored when logic operations are performed (when S3=1). G is the final ALU output. When S3 = 0, the final output comes from the arithmetic unit. When S3 = 1, the output comes from the logic unit. The arithmetic and logic units share the select inputs S1 and S0, but only the arithmetic unit uses S2. 2/22/2019 Arithmetic-logic units

Comments on the multiplexer Both the arithmetic unit and the logic unit are “active” and produce outputs. The mux determines whether the final result comes from the arithmetic or logic unit. The output of the other one is effectively ignored. Our hardware scheme may seem like wasted effort, but it’s not really. “Deactivating” one or the other wouldn’t save that much time. We have to build hardware for both units anyway, so we might as well run them together. This is a very common use of multiplexers in logic design. 2/22/2019 Arithmetic-logic units

Arithmetic-logic units The completed ALU This ALU is a good example of hierarchical design. With the 12 inputs, the truth table would have had 212 = 4096 lines. That’s an awful lot of paper. Instead, we were able to use components that we’ve seen before to construct the entire circuit from a couple of easy-to-understand components. As always, we encapsulate the complete circuit in a “black box” so we can reuse it in fancier circuits. 4 2/22/2019 Arithmetic-logic units

Arithmetic-logic units Arithmetic summary In the last few lectures we looked at: Building adders hierarchically, starting with one-bit full adders. Representations of negative numbers to simplify subtraction. Using adders to implement a variety of arithmetic functions. Logic functions applied to multi-bit quantities. Combining all of these operations into one unit, the ALU. Where are we now? We started at the very bottom, with primitive gates, and now we can understand a small but critical part of a CPU. This all built upon our knowledge of Boolean algebra, Karnaugh maps, multiplexers, circuit analysis and design, and data representations. 2/22/2019 Arithmetic-logic units