An Iterative Heuristic for State Justification in Sequential Automatic Test Pattern Generation Aiman H. El-Maleh Sadiq M. Sait Syed Z. Shazli Department of Computer Engineering King Fahd University of Petroleum and Minerals Dhahran, Saudi Arabia

Outline Motivation Sequential Test Generation Genetic Algorithms for Test Generation Problem definition & existing solutions Proposed approach Experimental results Comparison with other approaches Conclusions

Motivation Testing of ICs accounts for significant percentage of design & production costs. Deterministic, fault-oriented sequential circuit test generation is highly complex and time consuming. Hard to detect faults require very high CPU time and often not detected. New approaches needed to reduce execution time and improve fault coverage. Evolutionary algorithms effective in solving many search and optimization problems. Genetic algorithms

Sequential Test Generation A sequential circuit has memory in addition to combinational logic. Testing for a fault in a sequential circuit requires A vector to activate the fault A propagation sequence to propagate the fault effect to a primary output A state justification sequence to justify the required state on the memory elements State justification using deterministic algorithms is a difficult problem with high execution times.

Genetic Algorithms for Test Generation Basic idea is population improves with each generation Population: A set of input vectors or vector sequences. Fitness function: Based on fault or logic simulation of candidate vectors or sequences Regeneration rules (heuristics): Members with higher fitness function values are selected to produce new members via transformations like mutation and crossover.

Problem Definition & Existing Solutions State justification: Process of finding a sequence of inputs that will drive the state machine from the reset (or unknown or KNOWN?) state to the present state required by the test. Existing solutions: Deterministic Algorithms: State justification involves backtracking, high CPU time Hard to detect faults often not detected More effective for control-dominant circuits Poor performance for circuits with large number of invalid states (retimed circuits) Able to identify redundant faults

Existing Solutions Simulation-based Approaches: Processing occurs in forward direction only More effective for data-path-dominant circuits Unable to identify redundant faults A Hybrid approach is needed Deterministic algorithms for fault activation and propagation State justification using Simulation-based approaches

Proposed Hybrid State Justification Framework Select Target Fault Run Deterministic ATPG Y Fault simulate generated sequence Fault detected N Justify state using Genetic Algorithm

The GA-Based State Justification Approach in [Hsiao 98] A chromosome is a sequence of test vectors (fixed length) Objective: To genetically engineer a state justification sequence Logic simulation is used to get the state reached by the sequence The fitness function matches only the last state reached, with the desired state. Drawbacks of the approach Length of the sequence depends on structural sequential depth of the circuit Quality of intermediate states reached is not considered while justifying a target state

The Approach used in [Hsiao 98] Desired state 10x10x 0110 V1 001100 1100 V2 1011 V3 0101 V4 Fit (P1) = 3 / 4 1110 V1 101001 0100 V2 0011 V3 1101 V4 Fit (P2) = 3 / 4 0110 V1 101101 0100 V2 0011 V3 0101 V4 Fit (Child) = 1

Proposed GA-Based State Justification We apply GA while moving from a state to a state A chromosome consists of a single vector instead of a sequence of vectors State justification sequences are genetically engineered vector-by-vector Fitness based on number of matching bits between reached and desired state (Hamming distance) A Tabu List containing the last visited states is maintained. Prevents algorithm from visiting recently visited FSM states If FSM state reached is Tabu, next fit vector is chosen

The Proposed Approach Reset state 0000 Target state 11x0 C1: 010011 0001 Fit(P1) = 0 / 3 C2: 110101 0010 Fit(P2) = 1 / 3 C3: 010101 0110 Fit(C) = 2 / 3 010101 is added to the state justification sequence 0110 becomes the new reset state

Proposed GA-Based State Justification Backtrack limit Backtrack to last visited state when all chromosomes produce states that are Tabu (happens in control dominated ckts) Algorithm stops searching for a state when limit exceeded Nlimit A minimum limit on the number of states to be traversed for reaching an objective state Algorithm stops if fitness of current state is less than average fitness of last Nlimit visited states If desired state is reached Compare all reached states by the derived sequence to desired states All desired states reached are removed

Proposed GA-Based State Justification

Experimental results Benchmark circuits List of desired states ISCAS 89 sequential circuits Retimed circuits (Used high CPU time in deterministic ATPG of HITEC) List of desired states Ran HITEC ATPG for 109 backtracks to remove undetectable faults States generated for all aborted faults (not detected) States relaxed to keep only necessary requirements States merged to reduce number of desired states

GA Parameters used (n+1) replacement strategy Random-Elitist strategy The initial population is randomly generated Rate of crossover is 1 Mutation rate is 0.01 Single point crossover Roulette-wheel used for selecting parents Three replacement strategies explored (n+1) replacement strategy Worst member of previous generation replaced new chromosome if new chromosome fitter Average fitness monotonically increases in every generation Random-Elitist strategy N/2 crossovers in every generation; N is population size Fittest half of chromosomes transferred directly to next generation Other half selected randomly Roulette Elitist strategy Other half selected by roulette wheel

Effect of Replacement Policies

Average & Best Fitness (n+1) replacement strategy Lowest execution time Reached comparable number of states (Best in most circuits except two)

Quality of States Reached Unreached State

Recommended Parameters Our technique Population size 32 Generations 400 TLS 15 Nlimit 1.5 * (#DFF) BT Limit 10 Technique in [Hsiao 98] Length of sequence = 4*seq.depth A population size of 32 Number of generations is 8 Two-point uniform crossover; probability of crossover is 1. Any vector in the chromosome is replaced with another random vector in mutation; probability of mutation is 0.01 Tournament selection mechanism

Recommended vs. Best

Comparison with [Hsiao 98]

Comparison with [Hsiao 98]

Comparison with [Hsiao 98]

Conclusions A hybrid ATPG approach for sequential circuits involving deterministic and GA-based state justification A novel state justification procedure based on GA Genetic engineering of a sequence ‘vector by vector’. Advantage of dynamically determining the length of justification sequence Benefit of taking quality of intermediate states into account Use of Tabu List to prevent the algorithm from visiting previously visited state Comparison of three replacement strategies (n+1) replacement strategy gave better results Achieved better results than the technique in [Hsiao 98]