Electronics System Design

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Presentation transcript:

Electronics System Design Mattias O’Nils, Bengt Oelmann, Munir Abdalla Trond Ytterdal*, Tang Lei* Benny Thörnberg, Håkan Norell, Shang Xue, Jan Lundgren, Cao Cao*, Jon Alfredsson* ITM, Electronics design division

Activities Electronics design division (Prof. Hans-Erik Nilsson) Sensor Electronics system design Simulation Fibre RFID Mixed-signal design Low-power design Real-time image processning Bengt Oelmann Johan Sidén Peter Jonsson Torbjörn Olsson Mattias O’Nils Bengt Oelmann Munir Abdalla Jan Lundgren Trond Ytterdal* Mattias O’Nils Bengt Oelmann Cao Cao* Jon Alfredsson* Mattias O’Nils Bengt Oelmann Shang Xue Håkan Norell Benny Thörnberg Tang Lei* ITM, Electronics design division

Analog and Mixed-signal Readout electronics for X-ray imaging Integrating pixel read-out Photon-counting radiation detection (Colour X-ray imaging) Behavioural model of photon-counting pixel Behavioural noise coupling simulation ITM, Electronics design division

Analog and Mixed-signal X-ray pixel detectors and readout Integration read-out Pixelated detector structures Photon counting read-out Together with the Medipix project ITM, Electronics design division

Analog and Mixed-signal Behavioural modelling X-ray source Charge integrator Clock generator Event counter Filter Detector Pulse shaping Discriminator HP LP Modelled in SystemC as synchronous data flow ITM, Electronics design division

Analog and Mixed-signal Noise coupling simulation ITM, Electronics design division

Analog and Mixed-signal Noise coupling simulation ITM, Electronics design division

ITM, Electronics design division Low-power design Low-power FSM implementation Low-power floating-gate ITM, Electronics design division

Low-power design Low-power finite-state machine design In the 8051 mC, the controller consumes 50% of the total power S4 S0 CAD-tool for power optimization S2 S1 State-transition graph S3 Input switching probabilities Statistics collection (FSM simulator) S1 S4 S0T Technology information S2T S3T Partitioner S2 Local FSM transformation User constraints FSM #1 FSM #2 VHDL code for logic synthesis ITM, Electronics design division

Low-power design Low-power low-voltage floating-gate CMOS UV-programmable 2-input gate Sub-threshold technique for digital and analog functions Basic digital gates + Flip/flops Analog cells: current mirrors, multipliers etc. Vdd Vss a b z FG Performance: Process: 0.8mm CMOS Vdd=0.2V Energy: Full-adder 0.6fJ 2500 times lower power consumption than standard-cell FG Programmability: Post-processing UV-programming Power-speed trade-offs made in the post- processing step ITM, Electronics design division

Real-time image processing Interface and memory architecture refinement Behavioural modelling and design analysis Low-power optimisations Algorithm improvement Rapid prototyping Video coding Image enhancement Video enhancement Angiography X-ray image enhancement Dental panoramic X-ray image reconstruction ITM, Electronics design division

Real-time image processing IMEM ITM, Electronics design division

Real-time image processing RIPA In stream Out stream FPGA Buffer Memory Interfaces Store all active frames Communication speed (PAL:30 Mbyts/s) ITM, Electronics design division

Real-time image processing Design of robust VLC Codecs Video transmission over a noisy channel VLC Coder Channel VLC Decoder Data packet Bit error Lost data symbol symbol ITM, Electronics design division

Real-time image processing Video filter ITM, Electronics design division

Real-time image processing Angiography image enhancement ITM, Electronics design division

Real-time image processing Panoramic image reconstruction ITM, Electronics design division

ITM, Electronics design division RFID-tag 7.5 mm 49 mm No internal power supply 1 mm Research topics at MH Robust antenna design RFID Application surroundings Fractal antenna design ITM, Electronics design division